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Hamid Savoj
Hamid Savoj
Affiliazione sconosciuta
Email verificata su savojsolutions.com
Titolo
Citata da
Citata da
Anno
SIS: A system for sequential circuit synthesis
ME Sentovich
Memorandom no. UCB/ERL M92/41, 1992
24761992
Sequential circuit design using synthesis and optimization
EM Sentovich, KJ Singh, C Moon, H Savoj, RK Brayton, ...
Proceedings 1992 IEEE International Conference on Computer Design: VLSI in …, 1992
6961992
Implicit state enumeration of finite state machines using BDD's
J Herve, S Hamid, L Bill, KB Robert, SV Alberto
in Computer-Aided Design, 1990. ICCAD-90. Digest of Technical Papers., 1990 …, 1990
5941990
Chemical function queries for 3D database search
J Greene, S Kahn, H Savoj, P Sprague, S Teig
Journal of Chemical Information and Computer Sciences 34 (6), 1297-1308, 1994
2661994
The use of observability and external don't cares for the simplification of multi-level networks
H Savoj, RK Brayton
Proceedings of the 27th ACM/IEEE Design Automation Conference, 297-301, 1991
1721991
Representing the design of a sub-module in a hierarchical integrated circuit design and analysis system
MA Riepe, RM Swanson, TM Burks, L Van Ginneken, KF Vahtra, H Savoj
US Patent 7,103,863, 2006
1592006
Extracting local don't cares for network optimization
H Savoj, RK Brayton, HJ Touati
1991 IEEE International Conference on Computer-Aided Design Digest of …, 1991
1581991
Method for generating design constraints for modules in a hierarchical integrated circuit design system
TM Burks, MA Riepe, H Savoj, RM Swanson, KE Vahtra, L Van Ginneken
US Patent 6,845,494, 2005
862005
Don't cares in multi-level network optimization
H Savoj
University of California, Berkeley, 1992
811992
Delay optimization of combinational logic circuits by clustering and partial collapsing
HJ Touati, H Savoj, RK Brayton
1991 IEEE International Conference on Computer-Aided Design Digest of …, 1991
771991
Timing optimization in presence of interconnect delays
PV Buch, H Savoj, LPPP Van Ginneken
US Patent 6,553,338, 2003
522003
Observability relations and observability don't cares
H Savoj, RK Brayton
1991 IEEE International Conference on Computer-Aided Design Digest of …, 1991
491991
Improved Scripts in MIS-II for Logic Minimizaton of Combinational Circuits
H Savoj
Proceedings of the International Workshop on Logic Synthesis, 1991
451991
SIS: A system for sequential circuit synthesis. Electronics Research Laboratory
E Sentovich, K Singh, L Lavagno, C Moon, R Murgai, A Saldanha, ...
University of California, Berkeley. Ucb/erl m92/41 edn, 1992
421992
Image manipulation for web content
D Berthelot, M Dixon, R Madhavan, M Mapua, P Mihelich, W Min, H Savoj, ...
US Patent 9,405,734, 2016
382016
Boolean matching in logic synthesis
H Savoj, MJ Silva, RK Brayton, A Sangiovanni-Vincentelli
Proceedings EURO-DAC'92: European Design Automation Conference, 168,169,170 …, 1992
381992
LEOPARD: A logical effort-based fanout optimizer for area and delay
P Rezvani, AH Ajami, M Pedram, H Savoj
1999 IEEE/ACM International Conference on Computer-Aided Design. Digest of …, 1999
331999
Physical synthesis for ASIC datapath circuits
TT Ye, S Chaudhuri, F Huang, H Savoj, G De Micheli
2002 IEEE International Symposium on Circuits and Systems (ISCAS) 3, III-III, 2002
312002
SIS: A System for Sequential Circuit Synthesis. Electronics Research Laboratory, Department of Electrical Engineering and Computer Science
EM Sentovich, KJ Singh, L Lavagno, C Moon, R Murgai, A Saldanha, ...
University of California, Berkeley 4, 1992
281992
An efficient linear time algorithm for scan chain optimization and repartitioning
D Berthelot, S Chaudhuri, H Savoj
Proceedings. International Test Conference, 781-787, 2002
272002
Il sistema al momento non può eseguire l'operazione. Riprova più tardi.
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