| Mqsim: A framework for enabling realistic studies of modern multi-queue {SSD} devices A Tavakkol, J Gómez-Luna, M Sadrosadati, S Ghose, O Mutlu 16th {USENIX} Conference on File and Storage Technologies ({FAST} 18), 49-66, 2018 | 126 | 2018 |
| FLIN: Enabling fairness and enhancing performance in modern NVMe solid state drives A Tavakkol, M Sadrosadati, S Ghose, J Kim, Y Luo, Y Wang, NM Ghiasi, ... 2018 ACM/IEEE 45th Annual International Symposium on Computer Architecture …, 2018 | 75 | 2018 |
| Figaro: Improving system performance via fine-grained in-dram data relocation and caching Y Wang, L Orosa, X Peng, Y Guo, S Ghose, M Patel, JS Kim, JG Luna, ... 2020 53rd Annual IEEE/ACM International Symposium on Microarchitecture …, 2020 | 67 | 2020 |
| DAMOV: A new methodology and benchmark suite for evaluating data movement bottlenecks GF Oliveira, J Gómez-Luna, L Orosa, S Ghose, N Vijaykumar, I Fernandez, ... IEEE Access 9, 134457-134502, 2021 | 57 | 2021 |
| LTRF: Enabling high-capacity register files for GPUs via hardware/software cooperative register prefetching M Sadrosadati, A Mirhosseini, SB Ehsani, H Sarbazi-Azad, M Drumond, ... ACM SIGPLAN Notices 53 (2), 489-502, 2018 | 47 | 2018 |
| Reducing DRAM latency via charge-level-aware look-ahead partial restoration Y Wang, A Tavakkol, L Orosa, S Ghose, NM Ghiasi, M Patel, JS Kim, ... 2018 51st Annual IEEE/ACM International Symposium on Microarchitecture …, 2018 | 44 | 2018 |
| BiNoCHS: Bimodal network-on-chip for CPU-GPU heterogeneous systems A Mirhosseini, M Sadrosadati, B Soltani, H Sarbazi-Azad, TF Wenisch Proceedings of the Eleventh IEEE/ACM International Symposium on Networks-on …, 2017 | 40 | 2017 |
| An energy-efficient virtual channel power-gating mechanism for on-chip networks A Mirhosseini, M Sadrosadati, A Fakhrzadehgan, M Modarressi, ... 2015 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2015 | 40 | 2015 |
| NoM: Network-on-memory for inter-bank data transfer in highly-banked memories SHSA Rezaei, M Modarressi, R Ausavarungnirun, M Sadrosadati, O Mutlu, ... IEEE Computer Architecture Letters 19 (1), 80-83, 2020 | 39 | 2020 |
| pluto: In-dram lookup tables to enable massively parallel general-purpose computation JD Ferreira, G Falcao, J Gómez-Luna, M Alser, L Orosa, M Sadrosadati, ... arXiv preprint arXiv:2104.07699, 2021 | 29 | 2021 |
| ITAP: Idle-time-aware power management for GPU execution units M Sadrosadati, SB Ehsani, H Falahati, R Ausavarungnirun, A Tavakkol, ... ACM Transactions on Architecture and Code Optimization (TACO) 16 (1), 1-26, 2019 | 26 | 2019 |
| CODIC: A low-cost substrate for enabling custom in-DRAM functionalities and optimizations L Orosa, Y Wang, M Sadrosadati, JS Kim, M Patel, I Puddu, H Luo, ... 2021 ACM/IEEE 48th Annual International Symposium on Computer Architecture …, 2021 | 22 | 2021 |
| An efficient dvs scheme for on-chip networks using reconfigurable virtual channel allocators M Sadrosadati, A Mirhosseini, H Aghilinasab, H Sarbazi-Azad 2015 IEEE/ACM International Symposium on Low Power Electronics and Design …, 2015 | 22 | 2015 |
| Enabling efficient RDMA-based synchronous mirroring of persistent memory transactions A Tavakkol, A Kolli, S Novakovic, K Razavi, J Gómez-Luna, H Hassan, ... arXiv preprint arXiv:1810.09360, 2018 | 20 | 2018 |
| Effective cache bank placement for GPUs M Sadrosadati, A Mirhosseini, S Roozkhosh, H Bakhishi, H Sarbazi-Azad Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017, 31-36, 2017 | 18 | 2017 |
| Reducing power consumption of GPGPUs through instruction reordering H Aghilinasab, M Sadrosadati, MH Samavatian, H Sarbazi-Azad Proceedings of the 2016 international symposium on low power electronics and …, 2016 | 16 | 2016 |
| BARAN: Bimodal adaptive reconfigurable-allocator network-on-chip A Mirhosseini, M Sadrosadati, F Aghamohammadi, M Modarressi, ... ACM Transactions on Parallel Computing (TOPC) 5 (3), 1-29, 2019 | 15 | 2019 |
| Neda: Supporting Direct Inter-Core Neighbor Data Exchange in GPUs N Nematollahi, M Sadrosadati, H Falahati, M Barkhordar, H Sarbazi-Azad IEEE Computer Architecture Letters 17 (2), 225-229, 2018 | 12 | 2018 |
| pluto: Enabling massively parallel computation in dram via lookup tables JD Ferreira, G Falcao, J Gómez-Luna, M Alser, L Orosa, M Sadrosadati, ... 2022 55th IEEE/ACM International Symposium on Microarchitecture (MICRO), 900-919, 2022 | 11 | 2022 |
| A new methodology and open-source benchmark suite for evaluating data movement bottlenecks: a near-data processing case study GF Oliveira, J Gómez-Luna, L Orosa, S Ghose, N Vijaykumar, I Fernandez, ... SIGMETRICS, 2021 | 11 | 2021 |
Onur MutluETH Zürich and Carnegie Mellon UniversityEmail verificata su inf.ethz.ch
