Georgios Karakonstantis
Citata da
Citata da
Significance driven computation: a voltage-scalable, variation-aware, quality-tuning motion estimator
D Mohapatra, G Karakonstantis, K Roy
Proceedings of the 2009 ACM/IEEE international symposium on Low power …, 2009
Process variation tolerant low power DCT architecture
N Banerjee, G Karakonstantis, K Roy
2007 Design, Automation & Test in Europe Conference & Exhibition, 1-6, 2007
Exploiting dynamic timing margins in microprocessors for frequency-over-scaling with instruction-based clock adjustment
J Constantin, L Wang, G Karakonstantis, A Chattopadhyay, A Burg
2015 Design, Automation & Test in Europe Conference & Exhibition (DATE), 381-386, 2015
Voltage scalable high-speed robust hybrid arithmetic units using adaptive clocking
S Ghosh, D Mohapatra, G Karakonstantis, K Roy
IEEE transactions on very large scale integration (VLSI) systems 18 (9 …, 2009
Process-variation resilient and voltage-scalable DCT architecture for robust low-power computing
G Karakonstantis, N Banerjee, K Roy
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 18 (10 …, 2009
Low-power process-variation tolerant arithmetic units using input-based elastic clocking
D Mohapatra, G Karakonstantis, K Roy
Proceedings of the 2007 international symposium on Low power electronics and …, 2007
System level DSP synthesis using voltage overscaling, unequal error protection & adaptive quality tuning
G Karakonstantis, D Mohapatra, K Roy
2009 IEEE Workshop on Signal Processing Systems, 133-138, 2009
Mitigating the impact of faults in unreliable memories for error-resilient applications
S Ganapathy, G Karakonstantis, A Teman, A Burg
Proceedings of the 52nd Annual Design Automation Conference, 1-6, 2015
Logic and memory design based on unequal error protection for voltage-scalable, robust and adaptive DSP systems
G Karakonstantis, D Mohapatra, K Roy
Journal of Signal Processing Systems 68, 415-431, 2012
On the exploitation of the inherent error resilience of wireless systems under unreliable silicon
G Karakonstantis, C Roth, C Benkeser, A Burg
Proceedings of the 49th Annual Design Automation Conference, 510-515, 2012
Approximate computing with unreliable dynamic memories
S Ganapathy, A Teman, R Giterman, A Burg, G Karakonstantis
2015 IEEE 13th international new circuits and systems conference (NEWCAS), 1-4, 2015
Energy versus data integrity trade-offs in embedded high-density logic compatible dynamic memories
A Teman, G Karakonstantis, R Giterman, P Meinerzhagen, A Burg
2015 Design, Automation & Test in Europe Conference & Exhibition (DATE), 489-494, 2015
Containing the nanometer “pandora-box”: Cross-layer design techniques for variation aware low power systems
G Karakonstantis, A Chatterjee, K Roy
IEEE Journal on Emerging and Selected Topics in Circuits and Systems 1 (1 …, 2011
Shortening design time through multiplatform simulations with a portable OpenCL golden-model: the LDPC decoder case
G Falcao, M Owaida, D Novo, M Purnaprajna, N Bellas, CD Antonopoulos, ...
2012 IEEE 20th International Symposium on Field-Programmable Custom …, 2012
Workload-aware dram error prediction using machine learning
L Mukhanov, K Tovletoglou, H Vandierendonck, DS Nikolopoulos, ...
2019 IEEE International Symposium on Workload Characterization (IISWC), 106-118, 2019
Voltage over-scaling: A cross-layer design perspective for energy efficient systems
G Karakonstantis, K Roy
2011 20th European Conference on Circuit Theory and Design (ECCTD), 548-551, 2011
Measuring and exploiting guardbands of server-grade ARMv8 CPU cores and DRAMs
K Tovletoglou, L Mukhanov, G Karakonstantis, A Chatzidimitriou, ...
2018 48th Annual IEEE/IFIP International Conference on Dependable Systems …, 2018
Data mapping for unreliable memories
C Roth, C Benkeser, C Studer, G Karakonstantis, A Burg
2012 50th Annual Allerton Conference on Communication, Control, and …, 2012
Low-power variation-aware cores based on dynamic data-dependent bitwidth truncation
I Tsiokanos, L Mukhanov, G Karakonstantis
2019 Design, Automation & Test in Europe Conference & Exhibition (DATE), 698-703, 2019
Design methodology to trade off power, output quality and error resiliency: Application to color interpolation filtering
G Karakonstantis, N Banerjee, K Roy, C Chakrabarti
2007 IEEE/ACM International Conference on Computer-Aided Design, 199-204, 2007
Il sistema al momento non può eseguire l'operazione. Riprova più tardi.
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