| Physical design obfuscation of hardware: A comprehensive investigation of device and logic-level techniques A Vijayakumar, VC Patil, DE Holcomb, C Paar, S Kundu IEEE Transactions on Information Forensics and Security 12 (1), 64-77, 2016 | 117 | 2016 |
| A novel modeling attack resistant PUF design based on non-linear voltage transfer characteristics A Vijayakumar, S Kundu 2015 Design, Automation & Test in Europe Conference & Exhibition (DATE), 653-658, 2015 | 117 | 2015 |
| Machine learning resistant strong PUF: Possible or a pipe dream? A Vijayakumar, VC Patil, CB Prado, S Kundu 2016 IEEE international symposium on hardware oriented security and trust …, 2016 | 111 | 2016 |
| On improving reliability of SRAM-based physically unclonable functions A Vijayakumar, VC Patil, S Kundu Journal of Low Power Electronics and Applications 7 (1), 2, 2017 | 42 | 2017 |
| A chaotic ring oscillator based random number generator SN Dhanuskodi, A Vijayakumar, S Kundu 2014 IEEE International Symposium on Hardware-Oriented Security and Trust …, 2014 | 32 | 2014 |
| Improving reliability of weak PUFs via circuit techniques to enhance mismatch VC Patil, A Vijayakumar, DE Holcomb, S Kundu 2017 IEEE International Symposium on Hardware Oriented Security and Trust …, 2017 | 17 | 2017 |
| On testing physically unclonable functions for uniqueness A Vijayakumar, VC Patil, S Kundu 2016 17th International symposium on quality electronic design (ISQED), 368-373, 2016 | 12 | 2016 |
| An efficient method for clock skew scheduling to reduce peak current A Vijayakumar, VC Patil, S Kundu 2016 29th International Conference on VLSI Design and 2016 15th …, 2016 | 12 | 2016 |
| Glitch power reduction via clock skew scheduling A Vijayakumar, S Kundu 2014 IEEE Computer Society Annual Symposium on VLSI, 504-509, 2014 | 11 | 2014 |
| On design of low cost power supply noise detection sensor for microprocessors A Vijayakumar, R Kumar, S Kundu 2012 IEEE Computer Society Annual Symposium on VLSI, 120-125, 2012 | 11 | 2012 |
| On pattern generation for maximizing IR drop A Vijayakumar, VC Patil, G Paladugu, S Kundu Fifteenth International Symposium on Quality Electronic Design, 731-737, 2014 | 6 | 2014 |
| A system-level solution for managing spatial temperature gradients in thinned 3D ICs A Annamalai, R Kumar, A Vijayakumar, S Kundu International Symposium on Quality Electronic Design (ISQED), 88-95, 2013 | 5 | 2013 |
| Manufacturer turned attacker: Dangers of stealthy trojans via threshold voltage manipulation VC Patil, A Vijayakumar, S Kundu 2017 IEEE North Atlantic Test Workshop (NATW), 1-6, 2017 | 4 | 2017 |
| On meta-obfuscation of physical layouts to conceal design characteristics VC Patil, A Vijayakumar, S Kundu 2016 IEEE International Symposium on Defect and Fault Tolerance in VLSI and …, 2016 | 3 | 2016 |
| Stress aware switching activity driven low power design of critical paths in nanoscale CMOS circuits S Srinivasan, B Phanibhushana, A Vijayakumar, S Kundu Proceedings of the 21st edition of the great lakes symposium on Great lakes …, 2011 | 2 | 2011 |
| Preventing integrated circuit piracy via custom encoding of hardware instruction set VC Patil, A Vijayakumar, S Kundu 2016 17th International Symposium on Quality Electronic Design (ISQED), 234-241, 2016 | | 2016 |
| On Physical Disorder Based Hardware Security Primitives A Vijayakumar | | 2016 |
| On Maximizing Decoupling Capacitance of Clock-Gated Logic for Robust Power Delivery A Vijayakumar, VC Patil, S Kundu 2014 IEEE Computer Society Annual Symposium on VLSI, 510-515, 2014 | | 2014 |
Sandip KunduUniversity of MassachusettsEmail verificata su ecs.umass.edu
