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Lennart Bamberg
Lennart Bamberg
Senior Principal Architect @ NXP
Email verificata su uni-bremen.de
Titolo
Citata da
Citata da
Anno
Macro-3D: A physical design methodology for face-to-face-stacked heterogeneous 3D ICs
L Bamberg, A García-Ortiz, L Zhu, S Pentapati, SK Lim
2020 Design, Automation & Test in Europe Conference & Exhibition (DATE), 37-42, 2020
302020
High-level energy estimation for submicrometric TSV arrays
L Bamberg, A Garcia-Ortiz
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 25 (10 …, 2017
252017
Low-power coding: Trends and new challenges
A Garcia-Ortiz, L Bamberg, A Najafi
Journal of Low Power Electronics 13 (3), 356-370, 2017
232017
Heterogeneous 3D integration for a RISC-V system with STT-MRAM
L Zhu, L Bamberg, A Agnesina, F Catthoor, D Milojevic, M Komalan, ...
IEEE Computer Architecture Letters 19 (1), 51-54, 2020
182020
Edge effects on the TSV array capacitances and their performance influence
L Bamberg, A Najafi, A García-Ortiz
Integration 61, 1-10, 2018
162018
A logic-on-memory processor-system design with monolithic 3-D technology
S Pentapati, L Zhu, L Bamberg, A García-Ortiz, SK Lim
IEEE Micro 39 (6), 38-45, 2019
142019
NoCs in heterogeneous 3D SoCs: Co-design of routing strategies and microarchitectures
JM Joseph, L Bamberg, D Ermel, BR Perjikolaei, A Drewes, A García-Ortiz, ...
IEEE Access 7, 135145-135163, 2019
132019
Integer-value encoding for approximate on-chip communication
A Najafi, L Bamberg, A Najafi, A Garcia-Ortiz
IEEE Access 7, 179220-179234, 2019
112019
Ratatoskr: An open-source framework for in-depth power, performance, and area analysis and optimization in 3d nocs
JM Joseph, L Bamberg, I Hajjar, BR Perjikolaei, A García-Ortiz, T Pionteck
ACM Transactions on Modeling and Computer Simulation (TOMACS) 32 (1), 1-21, 2021
10*2021
High-performance logic-on-memory monolithic 3-D IC designs for arm Cortex-A processors
L Zhu, L Bamberg, SSK Pentapati, K Chang, F Catthoor, D Milojevic, ...
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 29 (6 …, 2021
72021
Coding-aware link energy estimation for 2D and 3D networks-on-chip with virtual channels
L Bamberg, JM Joseph, R Schmidt, T Pionteck, A García-Ortiz
2018 28th International Symposium on Power and Timing Modeling, Optimization …, 2018
72018
NEWROMAP: mapping CNNs to NoC-interconnected self-contained data-flow accelerators for edge-AI
JM Joseph, MS Baloglu, Y Pan, R Leupers, L Bamberg
Proceedings of the 15th IEEE/ACM International Symposium on Networks-on-Chip …, 2021
52021
A coding approach to improve the energy efficiency of approximate NoCs
A Najafi, L Bamberg, GP Vayá, A Garcia-Ortiz
2019 14th International Symposium on Reconfigurable Communication-centric …, 2019
52019
Exploiting temporal misalignment to optimize the interconnect performance for 3D integration
L Bamberg, A García-Ortiz
2018 28th International Symposium on Power and Timing Modeling, Optimization …, 2018
52018
Misalignment-aware delay modeling of narrow on-chip interconnects considering variability
A Najafi, L Bamberg, A Najafi, A Garcia-Ortiz
2018 7th International Conference on Modern Circuits and Systems …, 2018
52018
Energy modeling of coupled interconnects including intrinsic misalignment effects
A Najafi, L Bamberg, A Najafi, A Garcia-Ortiz
2016 26th International Workshop on Power and Timing Modeling, Optimization …, 2016
52016
ARTS: An adaptive regularization training schedule for activation sparsity exploration
Z Zhu, A Pourtaherian, L Waeijen, L Bamberg, E Bondarev, O Moreira
2022 25th Euromicro Conference on Digital System Design (DSD), 415-422, 2022
42022
Edge effect aware low-power crosstalk avoidance technique for 3D integration
L Bamberg, A Najafi, A Garcia-Ortiz
Integration 69, 98-110, 2019
42019
Simulation environment for link energy estimation in networks-on-chip with virtual channels
JM Joseph, L Bamberg, I Hajjar, R Schmidt, T Pionteck, A Garcia-Ortiz
Integration 68, 147-156, 2019
42019
Synapse compression for event-based convolutional-neural-network accelerators
L Bamberg, A Pourtaherian, L Waeijen, A Chahar, O Moreira
IEEE Transactions on Parallel and Distributed Systems 34 (4), 1227-1240, 2023
32023
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