A 4Mb embedded SLC resistive-RAM macro with 7.2 ns read-write random-access time and 160ns MLC-access capability SS Sheu, MF Chang, KF Lin, CW Wu, YS Chen, PF Chiu, CC Kuo, ... 2011 IEEE International Solid-State Circuits Conference, 200-202, 2011 | 269 | 2011 |
RRAM defect modeling and failure analysis based on march test and a novel squeeze-search scheme CY Chen, HC Shih, CW Wu, CH Lin, PF Chiu, SS Sheu, FT Chen IEEE Transactions on Computers 64 (1), 180-190, 2014 | 245 | 2014 |
Low store energy, low VDDmin, 8T2R nonvolatile latch and SRAM with vertical-stacked resistive memory (memristor) devices for low power mobile applications PF Chiu, MF Chang, CW Wu, CH Chuang, SS Sheu, YS Chen, MJ Tsai IEEE Journal of Solid-State Circuits 47 (6), 1483-1496, 2012 | 182 | 2012 |
An agile approach to building RISC-V microprocessors Y Lee, A Waterman, H Cook, B Zimmer, B Keller, A Puggelli, J Kwak, ... ieee Micro 36 (2), 8-20, 2016 | 153 | 2016 |
A low store energy, low VDDmin, nonvolatile 8T2R SRAM with 3D stacked RRAM devices for low power mobile applications PF Chiu, MF Chang, SS Sheu, KF Lin, PC Chiang, CW Wu, WP Lin, ... 2010 Symposium on VLSI Circuits, 229-230, 2010 | 122 | 2010 |
BOOMv2: an open-source out-of-order RISC-V core C Celio, PF Chiu, B Nikolic, DA Patterson, K Asanovic First Workshop on Computer Architecture Research with RISC-V (CARRV), 2017 | 115 | 2017 |
Circuit design challenges in embedded memory and resistive RAM (RRAM) for mobile SoC and 3D-IC MF Chang, PF Chiu, SS Sheu 16th Asia and South Pacific Design Automation Conference (ASP-DAC 2011), 197-203, 2011 | 106 | 2011 |
A high-speed 7.2-ns read-write random access 4-Mb embedded resistive RAM (ReRAM) macro using process-variation-tolerant current-mode read schemes MF Chang, SS Sheu, KF Lin, CW Wu, CC Kuo, PF Chiu, YS Yang, ... IEEE Journal of Solid-State Circuits 48 (3), 878-891, 2012 | 92 | 2012 |
A RISC-V vector processor with simultaneous-switching switched-capacitor DC–DC converters in 28 nm FDSOI B Zimmer, Y Lee, A Puggelli, J Kwak, R Jevtić, B Keller, S Bailey, ... IEEE Journal of Solid-State Circuits 51 (4), 930-942, 2016 | 81 | 2016 |
Challenges and opportunities for HfOX based resistive random access memory YS Chen, HY Lee, PS Chen, CH Tsai, PY Gu, TY Wu, KH Tsai, SS Sheu, ... 2011 International Electron Devices Meeting, 31.3. 1-31.3. 4, 2011 | 67 | 2011 |
Non-volatile static random access memory and operation method thereof PF Chiu, MF Chang, KF Lin, SS Sheu US Patent 8,331,134, 2012 | 55 | 2012 |
A RISC-V vector processor with tightly-integrated switched-capacitor DC-DC converters in 28nm FDSOI B Zimmer, Y Lee, A Puggelli, J Kwak, R Jevtic, B Keller, S Bailey, ... 2015 Symposium on VLSI Circuits (VLSI Circuits), C316-C317, 2015 | 53 | 2015 |
A RISC-V processor SoC with integrated power management at submicrosecond timescales in 28 nm FD-SOI B Keller, M Cochet, B Zimmer, J Kwak, A Puggelli, Y Lee, M Blagojević, ... IEEE Journal of Solid-State Circuits 52 (7), 1863-1875, 2017 | 52 | 2017 |
Endurance-aware circuit designs of nonvolatile logic and nonvolatile SRAM using resistive memory (memristor) device MF Chang, CH Chuang, MP Chen, LF Chen, H Yamauchi, PF Chiu, ... 17th Asia and south pacific design automation conference, 329-334, 2012 | 46 | 2012 |
Nonvolatile static random access memory cell and memory circuit MC Wang, PF Chiu, SS Sheu US Patent 8,508,983, 2013 | 45 | 2013 |
Challenges and trends in low-power 3D die-stacked IC designs using RAM, memristor logic, and resistive memory (ReRAM) MF Chang, PF Chiu, WC Wu, CH Chuang, SS Sheu 2011 9th IEEE International Conference on ASIC, 299-302, 2011 | 35 | 2011 |
Broom: an open-source out-of-order processor with resilient low-voltage operation in 28-nm cmos C Celio, PF Chiu, K Asanović, B Nikolić, D Patterson IEEE Micro 39 (2), 52-60, 2019 | 32 | 2019 |
Configurable precision neural network with differential binary non-volatile memory cell structure WH Choi, PF Chiu, W Ma, M Lueker-boden US Patent 10,643,705, 2020 | 29 | 2020 |
A differential 2R crosspoint RRAM array with zero standby current PF Chiu, B Nikolić IEEE Transactions on Circuits and Systems II: Express Briefs 62 (5), 461-465, 2014 | 29 | 2014 |
Raven: A 28nm RISC-V vector processor with integrated switched-capacitor DC-DC converters and adaptive clocking Y Lee, B Zimmer, A Waterman, A Puggelli, J Kwak, R Jevtic, B Keller, ... 2015 IEEE Hot Chips 27 Symposium (HCS), 1-45, 2015 | 24 | 2015 |