Weirong Jiang
Citata da
Citata da
Scalable packet classification on FPGA
W Jiang, VK Prasanna
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 20 (9 …, 2011
Compact architecture for high-throughput regular expression matching on FPGA
YHE Yang, W Jiang, VK Prasanna
Proceedings of the 4th ACM/IEEE Symposium on Architectures for Networking …, 2008
Beyond TCAMs: An SRAM-based parallel multi-pipeline architecture for terabit IP lookup
W Jiang, Q Wang, VK Prasanna
IEEE INFOCOM 2008-The 27th Conference on Computer Communications, 1786-1794, 2008
Large-scale wire-speed packet classification on FPGAs
W Jiang, VK Prasanna
Proceedings of the ACM/SIGDA international symposium on Field programmable …, 2009
Field-split parallel architecture for high performance multi-match packet classification using FPGAs
W Jiang, VK Prasanna
Proceedings of the twenty-first annual symposium on Parallelism in …, 2009
Scalable ternary content addressable memory implementation using FPGAs
W Jiang
Architectures for Networking and Communications Systems, 71-82, 2013
Optimizing routing metrics for large-scale multi-radio mesh networks
W Jiang, S Liu, Y Zhu, Z Zhang
2007 International Conference on Wireless Communications, Networking and …, 2007
A memory-balanced linear pipeline architecture for trie-based IP lookup
W Jiang, VK Prasanna
15th Annual IEEE Symposium on High-Performance Interconnects (HOTI 2007), 83-90, 2007
ParaSplit: A scalable architecture on FPGA for terabit packet classification
J Fong, X Wang, Y Qi, J Li, W Jiang
2012 IEEE 20th Annual Symposium on High-Performance Interconnects, 1-8, 2012
Real-time classification of multimedia traffic using FPGA
W Jiang, M Gokhale
2010 International Conference on Field Programmable Logic and Applications …, 2010
High-speed packet processing using reconfigurable computing
G Brebner, W Jiang
IEEE Micro 34 (1), 8-18, 2014
Multi-dimensional packet classification on FPGA: 100 Gbps and beyond
Y Qi, J Fong, W Jiang, B Xu, J Li, V Prasanna
2010 International Conference on Field-Programmable Technology, 241-248, 2010
A sram-based architecture for trie-based ip lookup using fpga
H Le, W Jiang, VK Prasanna
2008 16th International Symposium on Field-Programmable Custom Computing …, 2008
Feacan: Front-end acceleration for content-aware network processing
Y Qi, K Wang, J Fong, Y Xue, J Li, W Jiang, V Prasanna
2011 Proceedings IEEE INFOCOM, 2114-2122, 2011
A scalable and modular architecture for high-performance packet classification
T Ganegedara, W Jiang, VK Prasanna
IEEE Transactions on Parallel and Distributed Systems 25 (5), 1135-1144, 2013
Parallel IP lookup using multiple SRAM-based pipelines
W Jiang, VK Prasanna
2008 IEEE International Symposium on Parallel and Distributed Processing, 1-14, 2008
Scalable multi-pipeline architecture for high performance multi-pattern string matching
W Jiang, YHE Yang, VK Prasanna
2010 IEEE International Symposium on Parallel & Distributed Processing …, 2010
A FPGA-based parallel architecture for scalable high-speed packet classification
W Jiang, VK Prasanna
2009 20th IEEE International Conference on Application-specific Systems …, 2009
Scalable high-throughput sram-based architecture for ip-lookup using FPGA
H Le, W Jiang, VK Prasanna
2008 International Conference on Field Programmable Logic and Applications …, 2008
Frug: A benchmark for packet forwarding in future networks
T Ganegedara, W Jiang, V Prasanna
International Performance Computing and Communications Conference, 231-238, 2010
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