Zhenyu Gu
Zhenyu Gu
Alibaba Group
Verified email at alibaba-inc.com
Title
Cited by
Cited by
Year
Three-dimensional chip-multiprocessor run-time thermal management
C Zhu, Z Gu, L Shang, RP Dick, R Joseph
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2008
2262008
ISAC: Integrated space-and-time-adaptive chip-package thermal analysis
Y Yang, Z Gu, C Zhu, RP Dick, L Shang
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2006
1622006
Reliable multiprocessor system-on-chip synthesis
C Zhu, Z Gu, RP Dick, L Shang
Proceedings of the 5th IEEE/ACM international conference on Hardware …, 2007
742007
Adaptive multi-domain thermal modeling and analysis for integrated circuit synthesis and design
Y Yang, C Zhu, Z Gu, L Shang, RP Dick
2006 IEEE/ACM International Conference on Computer Aided Design, 575-582, 2006
562006
Application-specific MPSoC reliability optimization
Z Gu, C Zhu, L Shang, RP Dick
IEEE transactions on very large scale integration (VLSI) systems 16 (5), 603-608, 2008
522008
Incremental exploration of the combined physical and behavioral design space
Z Gu, J Wang, RP Dick, H Zhou
Proceedings of the 42nd annual Design Automation Conference, 208-213, 2005
492005
Unified incremental physical-level and high-level synthesis
Z Gu, J Wang, RP Dick, H Zhou
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2007
412007
Sparse tensor core: Algorithm and hardware co-design for vector-wise sparse neural networks on modern gpus
M Zhu, T Zhang, Z Gu, Y Xie
Proceedings of the 52nd Annual IEEE/ACM International Symposium on …, 2019
372019
Adaptive chip-package thermal analysis for synthesis and design
Y Yang, Z Gu, C Zhu, L Shang, RP Dick
Proceedings of the Design Automation & Test in Europe Conference 1, 1-6, 2006
312006
Towards an ultra-low-power architecture using single-electron tunneling transistors
C Zhu, Z Gu, L Shang, RP Dick, RG Knobel
Proceedings of the 44th annual Design Automation Conference, 312-317, 2007
262007
Statistical formal activity analysis with consideration of temporal and spatial correlations
Z Gu, KS McElvain
US Patent 8,161,434, 2012
172012
Characterization of single-electron tunneling transistors for designing low-power embedded systems
C Zhu, Z Gu, RP Dick, L Shang, RG Knobel
IEEE transactions on very large scale integration (VLSI) systems 17 (5), 646-659, 2009
122009
Functional verification methodology of a 32-bit risc microprocessor
Z Gu, Z Yu, B Shen, Q Zhang
IEEE 2002 International Conference on Communications, Circuits and Systems …, 2002
82002
Duet: Boosting deep neural network efficiency on dual-module architecture
L Liu, Z Qu, L Deng, F Tu, S Li, X Hu, Z Gu, Y Ding, Y Xie
2020 53rd Annual IEEE/ACM International Symposium on Microarchitecture …, 2020
52020
Statistical formal activity analysis with consideration of temporal and spatial correlations
Z Gu, KS McElvain
US Patent 8,656,327, 2014
52014
Boosting deep neural network efficiency with dual-module inference
L Liu, L Deng, Z Chen, Y Wang, S Li, J Zhang, Y Yang, Z Gu, Y Ding, ...
International Conference on Machine Learning, 6205-6215, 2020
32020
Method and apparatus for generating push notifications
Z Huasha, X Li, Q Zhang, SI Luo, Z Gu, Q Zhang
US Patent 10,757,218, 2020
22020
Systems and methods for providing vector-wise sparsity in a neural network
ZHU Maohua, T Zhang, Z Gu, Y Xie
US Patent App. 16/937,202, 2021
2021
Systems and methods for providing block-wise sparsity in a neural network
ZHU Maohua, Z Gu, Y Xie
US Patent App. 16/521,564, 2021
2021
Systems and methods for accelerating sparse neural network execution
Z Gu, L Liu, S Li, Y Xie
US Patent App. 16/562,376, 2021
2021
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