Sujay Pandey
Titolo
Citata da
Citata da
Anno
DFM-aware fault model and ATPG for intra-cell and inter-cell defects
A Sinha, S Pandey, A Singhal, A Sanyal, A Schmaltz
2017 IEEE International Test Conference (ITC), 1-10, 2017
172017
Noise-resilient SRAM physically unclonable function design for security
S Pandey, S Deyati, A Singh, A Chatterjee
2016 IEEE 25th Asian Test Symposium (ATS), 55-60, 2016
102016
Concurrent error detection and tolerance in kalman filters using encoded state and statistical covariance checks
S Pandey, S Banerjee, A Chatterjee
2016 IEEE 22nd International Symposium on On-Line Testing and Robust Systemá…, 2016
52016
Cross-layer control adaptation for autonomous system resilience
MI Momtaz, S Banerjee, S Pandey, J Abraham, A Chatterjee
2018 IEEE 24th International Symposium on On-Line Testing And Robust Systemá…, 2018
42018
Characterization of Library Cells for Open-circuit Defect Exposure: A Systematic Methodology
S Pandey, S Gupta, M Sudhan L., S Natarajan, A Sinha, A Chatterjee
2019 IEEE International Test Conference (ITC), 2019
22019
Error resilient neuromorphic networks using checker neurons
S Pandey, S Banerjee, A Chatterjee
2018 IEEE 24th International Symposium on On-Line Testing And Robust Systemá…, 2018
22018
Sat-atpg generated multi-pattern scan tests for cell internal defects: Coverage analysis for resistive opens and shorts
S Pandey, Z Liao, S Nandi, S Gupta, S Natarajan, A Sinha, A Singh, ...
2020 IEEE International Test Conference (ITC), 1-10, 2020
12020
Two Pattern Timing Tests Capturing Defect-Induced Multi-Gate Delay Impact of Shorts
S Pandey, Z Liao, S Nandi, S Natarajan, A Sinha, A Singh, A Chatterjee
2021 IEEE 39th VLSI Test Symposium (VTS), 1-7, 2021
2021
ReiNN: Efficient error resilience in artificial neural networks using encoded consistency checks
S Pandey, S Banerjee, A Chatterjee
2018 IEEE 23rd European Test Symposium (ETS), 1-2, 2018
2018
Il sistema al momento non pu˛ eseguire l'operazione. Riprova pi¨ tardi.
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