Artificial neural network and accelerator co-design using evolutionary algorithms P Colangelo, O Segal, A Speicher, M Margala 2019 IEEE High Performance Extreme Computing Conference (HPEC), 1-8, 2019 | 15 | 2019 |
Automl for multilayer perceptron and fpga co-design P Colangelo, O Segal, A Speicher, M Margala 2020 IEEE 33rd International System-on-Chip Conference (SOCC), 265-266, 2020 | 6 | 2020 |
Visual learning curves for American sign language (ASL) alphabet S Rojas-Murillo, AB Pancho, MJ Cariaso, A Speicher, A Mato, O Segal International Journal of Industrial Ergonomics 81, 103027, 2021 | 4 | 2021 |
Evolutionary cell aided design for neural network architectures P Colangelo, O Segal, A Speicher, M Margala arXiv preprint arXiv:1903.02130, 2019 | 3 | 2019 |
Decentralized data center (DDC) P Rygula, A Speicher, J Contreras, V Talwar 2017 IEEE MIT Undergraduate Research Technology Conference (URTC), 1-5, 2017 | 3 | 2017 |
Automated Hardware and Neural Network Architecture co-design of FPGA accelerators using multi-objective Neural Architecture Search P Colangelo, O Segal, A Speicher, M Margala 2020 IEEE 10th International Conference on Consumer Electronics (ICCE-Berlin …, 2020 | | 2020 |