Evaluation of border traps and interface traps in HfO2/MoS2 gate stacks by capacitance–voltage analysis P Zhao, A Khosravi, A Azcatl, P Bolshakov, G Mirabelli, E Caruso, ...
2D Materials 5 (3), 031002, 2018
81 2018 Quantum confinement-induced semimetal-to-semiconductor evolution in large-area ultra-thin PtSe 2 films grown at 400° C L Ansari, S Monaghan, N McEvoy, CÓ Coileáin, CP Cullen, J Lin, R Siris, ...
npj 2D Materials and Applications 3 (1), 1-8, 2019
79 2019 Insights into Multi-Level Resistive Switching in Monolayer MoS2 S Bhattacharjee, E Caruso, N McEvoy, C Ó Coileáin, K O'Neill, L Ansari, ...
ACS Applied Materials & Interfaces, 2020
62 2020 Performance projection of III-V ultra-thin-body, FinFET, and nanowire MOSFETs for two next-generation technology nodes M Rau, E Caruso, D Lizzit, P Palestri, D Esseni, A Schenk, L Selmi, ...
2016 IEEE International Electron Devices Meeting (IEDM), 30.6. 1-30.6. 4, 2016
36 2016 Comprehensive comparison and experimental validation of band-structure calculation methods in III–V semiconductor quantum wells G Zerveas, E Caruso, G Baccarani, L Czornomaz, N Daix, D Esseni, ...
Solid-State Electronics 115, 92-102, 2016
30 2016 An improved surface roughness scattering model for bulk, thin-body, and quantum-well MOSFETs O Badami, E Caruso, D Lizzit, P Osgnach, D Esseni, P Palestri, L Selmi
IEEE Transactions on Electron Devices 63 (6), 2306-2312, 2016
23 2016 A scaled replacement metal gate InGaAs-on-Insulator n-FinFET on Si with record performance H Hahn, V Deshpande, E Caruso, S Sant, E O'Connor, Y Baumgartner, ...
2017 IEEE International Electron Devices Meeting (IEDM), 17.5. 1-17.5. 4, 2017
20 2017 The impact of interface states on the mobility and drive current of In0. 53Ga0. 47As semiconductor n-MOSFETs P Osgnach, E Caruso, D Lizzit, P Palestri, D Esseni, L Selmi
Solid-State Electronics 108, 90-96, 2015
18 2015 The Role of Oxide Traps Aligned With the Semiconductor Energy Gap in MOS Systems E Caruso, J Lin, S Monaghan, K Cherkaoui, F Gity, P Palestri, D Esseni, ...
IEEE Transactions on Electron Devices 67 (10), 4372-4378, 2020
17 2020 Modelling nanoscale n-MOSFETs with III-V compound semiconductor channels: From advanced models for band structures, electrostatics and transport to TCAD L Selmi, E Caruso, S Carapezzi, M Visciarelli, E Gnani, N Zagni, P Pavan, ...
2017 IEEE International Electron Devices Meeting (IEDM), 13.4. 1-13.4. 4, 2017
13 2017 Simulation analysis of III–V n-MOSFETs: Channel materials, Fermi level pinning and biaxial strain E Caruso, D Lizzit, P Osgnach, D Esseni, P Palestri, L Selmi
2014 IEEE International Electron Devices Meeting, 7.6. 1-7.6. 4, 2014
10 2014 On the electron velocity-field relation in ultra-thin films of III–V compound semiconductors for advanced CMOS technology nodes E Caruso, A Pin, P Palestri, L Selmi
2017 Joint International EUROSOI Workshop and International Conference on …, 2017
7 2017 Modeling approaches for band-structure calculation in III-V FET quantum wells E Caruso, G Zerveas, G Baccarani, L Czornomaz, N Daix, D Esseni, ...
EUROSOI-ULIS 2015: 2015 Joint International EUROSOI Workshop and …, 2015
7 2015 Performance study of strained III–V materials for ultra-thin body transistor applications M Rau, T Markussen, E Caruso, D Esseni, E Gnani, A Gnudi, ...
2016 46th European Solid-State Device Research Conference (ESSDERC), 184-187, 2016
6 2016 TCAD Mobility Model of III-V Short-Channel Double-Gate FETs Including Ballistic Corrections S Carapezzi, E Caruso, A Gnudi, P Palestri, S Reggiani, E Gnani
IEEE Transactions on Electron Devices 64 (12), 4882-4888, 2017
5 2017 Profiling border-traps by TCAD analysis of multifrequency CV-curves in Al2 O3 /InGaAs stacks E Caruso, J Lin, KF Burke, K Cherkaoui, D Esseni, F Gity, S Monaghan, ...
2018 Joint International EUROSOI Workshop and International Conference on …, 2018
4 2018 Quasi-Ballistic - and L-Valleys Transport in Ultrathin Body Strained (111) GaAs nMOSFETs E Caruso, P Palestri, D Lizzit, P Osgnach, D Esseni, L Selmi
IEEE Transactions on Electron Devices 63 (12), 4685-4692, 2016
4 2016 Improved surface roughness modeling and mobility projections in thin film MOSFETs O Badami, E Caruso, D Lizzit, D Esseni, P Palestri, L Selmi
2015 45th European Solid State Device Research Conference (ESSDERC), 306-309, 2015
4 2015 Systematic Modeling of Electrostatics, Transport, and Statistical Variability Effects of Interface Traps in End-of-the-Roadmap III–V MOSFETs N Zagni, E Caruso, FM Puglisi, P Pavan, P Palestri, G Verzellesi
IEEE Transactions on Electron Devices 67 (4), 1560-1566, 2020
3 2020 Semi-classical modeling of nanoscale nMOSFETs with III-V channel P Palestri, E Caruso, O Badami, F Driussi, D Esseni, L Selmi
2019 Electron Devices Technology and Manufacturing Conference (EDTM), 234-236, 2019
3 2019