| OpenRAM: An open-source memory compiler MR Guthaus, JE Stine, S Ataei, B Chen, B Wu, M Sarwar 2016 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 1-6, 2016 | 172 | 2016 |
| A 64 kB approximate SRAM architecture for low-power video applications S Ataei, JE Stine IEEE Embedded Systems Letters 10 (1), 10-13, 2017 | 38 | 2017 |
| A 64 kb differential single-port 12T SRAM design with a bit-interleaving scheme for low-voltage operation in 32 nm SOI CMOS S Ataei, JE Stine, MR Guthaus 2016 IEEE 34th international conference on computer design (ICCD), 499-506, 2016 | 21 | 2016 |
| AMC: An asynchronous memory compiler S Ataei, R Manohar 2019 25th IEEE International Symposium on Asynchronous Circuits and Systems …, 2019 | 19 | 2019 |
| An open-source eda flow for asynchronous logic S Ataei, W Hua, Y Yang, R Manohar, YS Lu, J He, S Maleki, K Pingali IEEE Design & Test 38 (2), 27-37, 2021 | 15 | 2021 |
| A 2.2 GHz High-Swing Class-C VCO with Wide Tuning Range, S Ataei, M Yavari IEEE International Midwest Symposium on Circuits and Sys- tems (IEEE MWSCAS), 2011 | 13 | 2011 |
| A high performance multi-port SRAM for low voltage shared memory systems in 32 nm CMOS S Ataei, M Gaalswyk, JE Stine 2017 IEEE 60th International Midwest Symposium on Circuits and Systems …, 2017 | 9 | 2017 |
| Multi replica bitline delay technique for variation tolerant timing of SRAM sense amplifiers S Ataei, JE Stine Proceedings of the 25th edition on Great Lakes Symposium on VLSI, 173-178, 2015 | 9 | 2015 |
| A differential single-port 8T SRAM bitcell for variability tolerance and low voltage operation S Ataei, JE Stine 2015 Sixth International Green and Sustainable Computing Conference (IGSC), 1-6, 2015 | 6 | 2015 |
| WIP. Open-source standard cell characterization process flow on 45 nm (FreePDK45), 0.18 µm, 0.25 µm, 0.35 µm and 0.5 µm R Thapa, S Ataei, JE Stine 2017 IEEE International Conference on Microelectronic Systems Education (MSE …, 2017 | 5 | 2017 |
| A 64 kb multi-threshold SRAM array with novel differential 8T bitcell in 32 nm SOI CMOS technology S Ataei, JE Stine 2016 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference …, 2016 | 3 | 2016 |
| A wideband dual-mode VCO with analog and digital automatic amplitude control circuitry S Ataei, M Yavari 2011 19th Iranian Conference on Electrical Engineering, 1-6, 2011 | 3 | 2011 |
| A unified memory compiler for synchronous and asynchronous circuits S Ataei, R Manohar Workshop on Open-Source EDA Technology (WOSET), 1-4, 2019 | 2 | 2019 |
| Shared-Staticizer for Area-Efficient Asynchronous Circuits S Ataei, R Manohar 2020 26th IEEE International Symposium on Asynchronous Circuits and Systems …, 2020 | 1 | 2020 |
| A Reconfigurable Replica Bitline to Determine Optimum SRAM Sense Amplifier Set Time S Ataei, JE Stiner Proceedings of the on Great Lakes Symposium on VLSI 2017, 269-274, 2017 | 1 | 2017 |
| Toward a digital flow for asynchronous VLSI systems S Ataei, J He, W Hua, YS Lu, S Maleki, Y Yang, K Pingali, R Manohar 2nd Workshop on Open-Source EDA Technology (WOSET), 0 | 1 | |
| A Methodology for Low-Power Approximate Embedded SRAM Within Multimedia Applications S Ataei, JE Stine 2018 31st IEEE International System-on-Chip Conference (SOCC), 266-271, 2018 | | 2018 |
| A 64 kb Differential Single-Port 12T SRAM Design With a Bit-Interleaving Scheme for Low S Ataei, JE Stine, MR Guthaus | | 2016 |
| OpenRAM: An Open-Source Memory Compiler Invited Paper MR Guthaus eScholarship, University of California, 2016 | | 2016 |
| A Very Low Noise Wideband Class-C CMOS LC VCO S Ataei, M Yavari Journal of Circuit, System and Computer (JCSC) 21 (4), 1250033(1-10), 2012 | | 2012 |
James E. Stine, Jr.Edward Joullian Endowed Chair and Professor in School of Electrical and Computer EngineeringEmail verificata su okstate.edu
