A 90-dB SNR 2.5-MHz output-rate ADC using cascaded multibit delta-sigma modulation at 8/spl times/oversampling ratio I Fujimori, L Longo, A Hairapetian, K Seiyama, S Kosic, J Cao, SL Chan IEEE Journal of Solid-State Circuits 35 (12), 1820-1828, 2000 | 292 | 2000 |
OC-192 transmitter and receiver in standard 0.18-/spl mu/m CMOS J Cao, M Green, A Momtaz, K Vakilian, D Chung, KC Jen, M Caresosa, ... IEEE Journal of Solid-State Circuits 37 (12), 1768-1780, 2002 | 172 | 2002 |
A multibit delta-sigma audio DAC with 120-dB dynamic range I Fujimori, A Nogi, T Sugimoto IEEE Journal of Solid-State Circuits 35 (8), 1066-1073, 2000 | 127 | 2000 |
A 1.5 V, 4.1 mW dual-channel audio delta-sigma D/A converter I Fujimori, T Sugimoto IEEE Journal of Solid-State Circuits 33 (12), 1863-1870, 1998 | 122 | 1998 |
A 5-V single-chip delta-sigma audio A/D converter with 111 dB dynamic range I Fujimori, K Koyama, D Trager, F Tam, L Longo IEEE Journal of Solid-State Circuits 32 (3), 329-336, 1997 | 104 | 1997 |
A 500 mW ADC-based CMOS AFE with digital calibration for 10 Gb/s serial links over KR-backplane and multimode fiber J Cao, B Zhang, U Singh, D Cui, A Vasani, A Garg, W Zhang, N Kocaman, ... IEEE Journal of Solid-State Circuits 45 (6), 1172-1185, 2010 | 92 | 2010 |
A 28 Gb/s multistandard serial link transceiver for backplane applications in 28 nm CMOS B Zhang, K Khanoyan, H Hatamkhani, H Tong, K Hu, S Fallahi, ... IEEE Journal of Solid-State Circuits 50 (12), 3089-3100, 2015 | 87 | 2015 |
High speed receive equalizer architecture A Momtaz, M Caresosa, D Chung, D Tonietto, G Yin, B Currivan, T Kolze, ... US Patent 7,623,600, 2009 | 85 | 2009 |
A fully integrated SONET OC-48 transceiver in standard CMOS A Momtaz, J Cao, M Caresosa, A Hairapetian, D Chung, K Vakilian, ... IEEE Journal of Solid-State Circuits 36 (12), 1964-1973, 2001 | 78 | 2001 |
OC-192 transmitter in standard 0.18/spl mu/m CMOS MM Green, A Momtaz, K Vakilian, X Wang, KC Jen, D Chung, J Cao, ... 2002 IEEE International Solid-State Circuits Conference. Digest of Technical …, 2002 | 63 | 2002 |
Power over ethernet controller integrated circuit architecture P Vorenkamp, A Woo, A Tammineedi, I Fujimori, D Chin, J Perzow US Patent 8,432,142, 2013 | 62 | 2013 |
OC-192 receiver in standard 0.18/spl mu/m CMOS J Cao, A Momtaz, K Vakilian, M Green, D Chung, KC Jen, M Caresosa, ... 2002 IEEE International Solid-State Circuits Conference. Digest of Technical …, 2002 | 60 | 2002 |
Analog-to-digital conversion using a multi-bit analog delta-sigma modulator combined with a one-bit digital delta-sigma modulator I Fujimori US Patent 6,326,912, 2001 | 59 | 2001 |
A 500mW digitally calibrated AFE in 65nm CMOS for 10Gb/s Serial links over backplane and multimode fiber J Cao, B Zhang, U Singh, D Cui, A Vasani, A Garg, W Zhang, N Kocaman, ... Solid-State Circuits Conference-Digest of Technical Papers, 2009. ISSCC 2009 …, 2009 | 58 | 2009 |
Apparatus and method for multipoint detection in power-over-ethernet detection mode P Vorenkamp, A Woo, A Tammineedi, I Fujimori, D Chin, J Perzow US Patent 9,189,043, 2015 | 52 | 2015 |
D/A converter and delta-sigma D/A converter I Fujimori US Patent 5,990,819, 1999 | 45 | 1999 |
Low voltage self cascode current mirror I Fujimori US Patent 5,966,005, 1999 | 43 | 1999 |
Circuit, system and method for performing dynamic element matching using bi-directional rotation within a data converter I Fujimori, A Hairapetian, L Longo US Patent 6,522,277, 2003 | 42 | 2003 |
Apparatus and method for classifying a powered device (PD) in a power source equipment (PSE) controller P Vorenkamp, A Woo, A Tammineedi, I Fujimori, D Chin, J Perzow US Patent 7,936,546, 2011 | 39 | 2011 |
Current-controlled CMOS circuit using higher voltage supply in low voltage CMOS process G Yin, I Fujimori, A Hairapetian US Patent 6,911,855, 2005 | 39 | 2005 |