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Scott D Constable
Scott D Constable
Verified email at intel.com
Title
Cited by
Cited by
Year
Privacy-preserving GWAS analysis on federated genomic datasets
SD Constable, Y Tang, S Wang, X Jiang, S Chapin
BMC medical informatics and decision making 15, 1-9, 2015
852015
{AEX-Notify}: Thwarting Precise {Single-Stepping} Attacks through Interrupt Awareness for Intel {SGX} Enclaves
S Constable, J Van Bulck, X Cheng, Y Xiao, C Xing, I Alexandrovich, ...
32nd USENIX Security Symposium (USENIX Security 23), 4051-4068, 2023
162023
Chameleon cache: Approximating fully associative caches with random replacement to prevent contention-based cache attacks
T Unterluggauer, A Harris, S Constable, F Liu, C Rozas
2022 IEEE International Symposium on Secure and Private Execution …, 2022
62022
Formal verification of a modern boot loader
SD Constable, R Sutton, A Sahebolamri, S Chapin
62018
Processor instruction support for mitigating controlled-channel and cache-based side-channel attacks
S Constable, F Liu, B Xing, M Steiner, M Vij, C Rozas, FX McKeen, ...
US Patent App. 16/458,015, 2020
42020
Extending seL4 integrity to the genode OS framework
S Constable, A Sahebolamri, S Chapin
Technical report, Critical Technologies, 2017
42017
Adding cycle noise to enclaved execution environment
S Constable, B Xing, F Liu, T Unterluggauer, K Zmudzinski
US Patent App. 17/019,880, 2022
32022
Seeds of seed: A side-channel resilient cache skewed by a linear function over a galois field
S Constable, T Unterluggauer
2021 International Symposium on Secure and Private Execution Environment …, 2021
32021
A formally verified heap allocator
A Sahebolamri, S Constable, SJ Chapin
Electrical Engineering and Computer Science-Technical Reports 182, 2018
32018
libOblivious: A c++ library for oblivious data structures and algorithms
SD Constable, S Chapin
32018
A high-level overview of sable, a modern secure loader
S Constable, R Sutton, SJ Chapin
Technical Report SYR-EECS-TR-2013-08, Syracuse University, 2013
22013
Apparatuses, methods, and systems for instructions to allow trusted execution environments to react to asynchronous exits
S Constable, M Shanahan, M Vij, B Xing, K Zmudzinski
US Patent App. 17/134,320, 2022
12022
Hardening branch hardware against speculation vulnerabilities
C Rozas, F Liu, X Zou, F McKeen, JW Brandt, J Nuzman, A Alameldeen, ...
US Patent App. 17/134,345, 2022
12022
Device, method and system to supplement a skewed cache with a victim cache
T Unterluggauer, A Alameldeen, S Constable, F Liu, F McKeen, C Rozas, ...
US Patent App. 17/127,786, 2022
12022
Techniques and technologies to address malicious single-stepping and zero-stepping of trusted execution environments
S Constable, Y Xiao, B Xing, M Vij, M Shanahan
US Patent App. 17/485,077, 2022
12022
User-level exception-based invocation of software instrumentation handlers
M LeMay, S Constable, DM Durham
US Patent App. 17/949,353, 2024
2024
Reducing instrumentation code bloat and performance overheads using a runtime call instruction
M LeMay, D Baum, J Cihula, JBCG Moreira, AL Vahldiek-Oberwagner, ...
US Patent App. 17/853,087, 2024
2024
Control flow integrity to prevent potential leakage of sensitive data to adversaries
SD Constable, JBCG Moreira, AA Milburn, K Sun, M LeMay, DM Durham, ...
US Patent App. 17/849,351, 2023
2023
Method for adding security features to sgx via patch on platforms that support patch rollback
S Constable, I Alexandrovich, I Anati, S Johnson, V Scarlata, M Vij, Y Xiao, ...
US Patent App. 17/948,829, 2023
2023
Device, method and system to supplement a cache with a randomized victim cache
T Unterluggauer, F Liu, C Rozas, S Constable, G Pokam, F McKeen, ...
US Patent App. 18/078,762, 2023
2023
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