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Sung-Yun Park
Sung-Yun Park
Assistant Research Scientist, University of Michigan
Email verificata su umich.edu
Titolo
Citata da
Citata da
Anno
Modular 128-Channel Δ-Δ Σ Analog Front-End Architecture Using Spectrum Equalization Scheme for 1024-Channel 3-D Neural Recording Microsystems
SY Park, J Cho, K Na, E Yoon
IEEE Journal of Solid-State Circuits 53 (2), 501-514, 2018
882018
Dynamic Power Reduction in Scalable Neural Recording Interface Using Spatiotemporal Correlation and Temporal Sparsity of Neural Signals
SY Park, J Cho, K Lee, E Yoon
IEEE Journal of Solid-State Circuits 53 (4), 1102-1114, 2018
432018
Power factor correction circuit and method of driving the same
JT Hwang, JS Kim, MS Jung, DH Kim, SY Park, FKS Ltd.
US Patent 8,148,956, 2012
322012
Control Device, LED Light Emitting Device including the same, and Control Method
GH Cho, MH Jung, SY Park, DH Kim, FKS Ltd.
US Patent 8,633,660, 2014
312014
Simultaneous Imaging and Energy Harvesting in CMOS Image Sensor Pixels
SY Park, K Lee, H Song, E Yoon
IEEE Electron Device Letters 39 (4), 532-535, 2018
272018
Low-power low-noise pseudo-open-loop preamplifier for neural interfaces
SI Chang, SY Park, E Yoon
IEEE Sensors Journal 17 (15), 4843-4852, 2017
262017
4.32-pJ/b, Overlap-Free, Feedforward Edge-Combiner-Based Ultra-Wideband Transmitter for High-Channel-Count Neural Recording
YJ Lin, SY Park, X Chen, D Wentzloff, E Yoon
IEEE Microwave and Wireless Components Letters 28 (1), 52-54, 2017
232017
A 272.49 pJ/pixel CMOS image sensor with embedded object detection and bio-inspired 2D optic flow generation for nano-air-vehicle navigation
K Lee, S Park, SY Park, J Cho, E Yoon
2017 Symposium on VLSI Circuits, C294-C295, 2017
212017
A PWM Buck Converter With Load-Adaptive Power Transistor Scaling Scheme Using Analog-Digital Hybrid Control for High Energy Efficiency in Implantable Biomedical Systems
SY Park, J Cho, K Lee, E Yoon
IEEE Transaction on Biomedical Circuits and Systems 9 (6), 885-895, 2015
212015
A Miniaturized 256-Channel Neural Recording Interface with Area-Efficient Hybrid Integration of Flexible Probes and CMOS Integrated Circuits
SY Park, K Na, M Vöröslakos, H Song, N Slager, S Oh, JP Seymour, ...
IEEE Transactions on Biomedical Engineering 69 (1), 334-346, 2021
192021
Toward 1024-channel parallel neural recording: Modular Δ-ΔΣ analog front-end architecture with 4.84fJ/C-s·mm2energy-area product
SY Park, J Cho, K Na, E Yoon
2015 Symposium on VLSI Circuits (VLSI Circuits), C112-C113, 2015
192015
Hybrid vertical directional coupling between a long range surface plasmon polariton waveguide and a dielectric waveguide
SY Park, JT Kim, JS Shin, SY Shin
Optics communications 282 (23), 4513-4517, 2009
182009
Minimally-invasive neural interface for distributed wireless electrocorticogram recording systems
SI Chang, SY Park, E Yoon
Sensors 18 (1), 263, 2018
162018
CMOS image sensor with two-step single-slope ADC using differential ramp generator
SY Park, HJ Kim
IEEE Transactions on Electron Devices 68 (10), 4966-4971, 2021
132021
PWM Buck Converter with >80% PCE in 45μA-to-4mA Loads Using Analog-Digital Hybrid Control for Implantable Biomedical Systems
SY Park, J Cho, K Lee, E Yoon
IEEE International Solid-State Circuits Conference, 218-219, 2015
122015
Compact Continuous Time Common-Mode Feedback Circuit for Low-Power, Area-Constrained Neural Recording Amplifiers
JY Kwak, SY Park
Electronics 10 (2), 145, 2021
102021
A 5.1 ms low-latency face detection imager with in-memory charge-domain computing of machine-learning classifiers
H Song, S Oh, J Salinas, SY Park, E Yoon
2021 Symposium on VLSI Circuits, 1-2, 2021
92021
Low-power, bio-inspired time-stamp-based 2-D optic flow sensor for artificial compound eyes of micro air vehicles
S Park, K Lee, H Song, J Cho, SY Park, E Yoon
IEEE Sensors Journal 19 (24), 12059-12068, 2019
92019
3.37 μW/Ch modular scalable neural recording system with embedded lossless compression for dynamic power reduction
SY Park, J Cho, E Yoon
2017 Symposium on VLSI Circuits, C168-C169, 2017
92017
A 3.1-5.2 GHz, energy-efficient single antenna, cancellation-free, bitwise time-division duplex transceiver for high channel count optogenetic neural interface
YJ Lin, H Song, S Oh, M Vöröslakos, K Kim, X Chen, DD Wentzloff, ...
IEEE Transactions on Biomedical Circuits and Systems 16 (1), 52-63, 2022
82022
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