Daniel Etiemble
Cited by
Cited by
MPI versus MPI+ OpenMP on the IBM SP for the NAS Benchmarks
F Cappello, D Etiemble
SC'00: Proceedings of the 2000 ACM/IEEE Conference on Supercomputing, 12-12, 2000
Comparison of binary and multivalued ICs according to VLSI criteria
D Etiemble, M Israel
Computer 21 (4), 28-42, 1988
Using CPU system management mode to circumvent operating system security functions
L Duflot, D Etiemble, O Grumelard
CanSecWest/core06, 2006
On the performance of multivalued integrated circuits: past, present and future
D Etiemble
IEICE Transactions on Electronics 76 (3), 364-371, 1993
Performance of CMOS current mode full adders
K Navi, A Kazeminejad, D Etiemble
Proceedings of 24th International Symposium on Multiple-Valued Logic (ISMVL …, 1994
Investigating the performance of two programming models for clusters of SMP PCs
F Cappello, O Richard, D Etiemble
Proceedings Sixth International Symposium on High-Performance Computer …, 2000
A Small Footprint Interleaved Multithread Processor for Embedded Systems
C Bechara, A Berhault, N Ventroux, Y Lhuillier, R David, D Etiemble
IEEE International Conference on Electronics, Circuits and Systems (ICECS), 2011
Self-adapting and multifunctional process and structure for the automated evaluation of logical or arithmetic expressions, particularly for extended database consultation
P Faudemay, D Etiemble, H He
US Patent 5,239,663, 1993
Parallel light speed labeling: an efficient connected component algorithm for labeling and analysis on multi-core processors
L Cabaret, L Lacassagne, D Etiemble
Journal of Real-Time Image Processing 15 (1), 173-196, 2018
High level transforms for SIMD and low-level computer vision algorithms
L Lacassagne, D Etiemble, A Hassan Zahraee, A Dominguez, P Vezolle
Proceedings of the 2014 Workshop on Programming Models for SIMD/Vector …, 2014
Understanding performance of SMP clusters running MPI programs
F Cappello, O Richard, D Etiemble
Future Generation Computer Systems 17 (6), 711-720, 2001
Parallel smith-waterman comparison on multicore and manycore computing platforms with BSP++
K Hamidouche, FM Mendonca, J Falcou, ACMA de Melo, D Etiemble
International Journal of Parallel Programming 41 (1), 111-136, 2013
Implementation of ternary circuits with-binary integrated circuits
D Etiemble, M Isreal
IEEE Transactions on Computers 100 (12), 1222-1233, 1977
Security issues related to pentium system management mode
L Duflot, D Etiemble, O Grumelard
Cansecwest security conference Core06, 2006
Customizing 16-bit floating point instructions on a NIOS II processor for FPGA image and media processing
D Etiemble, S Bouaziz, L Lacassagne
3rd Workshop on Embedded Systems for Real-Time Multimedia, 2005., 61-66, 2005
Multiple-valued MOS circuits and VLSI implementation
D Etiemble
Intern. Symp. on Multiple Valued Logic, 1986
A 4-valued ECL encoder and decoder circuit
M Brilman, D Etiemble, JL Oursel, P Tatareau
IEEE Journal of solid-state circuits 17 (3), 547-552, 1982
A framework for an automatic hybrid MPI+ OpenMP code generation.
K Hamidouche, J Falcou, D Etiemble
SpringSim (hpc), 48-55, 2011
45-year CPU evolution: one law and two equations
D Etiemble
arXiv preprint arXiv:1803.00254, 2018
High performance SoC design using magnetic logic and memory
W Zhao, L Torres, LV Cargnini, RM Brum, Y Zhang, Y Guillemenet, ...
IFIP/IEEE International Conference on Very Large Scale Integration-System on …, 2011
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