Microvesicles derived from adult human bone marrow and tissue specific mesenchymal stem cells shuttle selected pattern of miRNAs F Collino, MC Deregibus, S Bruno, L Sterpone, G Aghemo, L Viltono, ... PloS one 5 (7), e11803, 2010 | 745 | 2010 |
On the optimal design of triple modular redundancy logic for SRAM-based FPGAs FL Kastensmidt, L Sterpone, L Carro, MS Reorda Design, Automation and Test in Europe, 1290-1295, 2005 | 322 | 2005 |
A new reliability-oriented place and route algorithm for SRAM-based FPGAs L Sterpone, M Violante IEEE Transactions on Computers 55 (6), 732-744, 2006 | 204 | 2006 |
Analysis of the robustness of the TMR architecture in SRAM-based FPGAs L Sterpone, M Violante IEEE Transactions on Nuclear Science 52 (5), 1545-1549, 2005 | 170 | 2005 |
A new partial reconfiguration-based fault-injection system to evaluate SEU effects in SRAM-based FPGAs L Sterpone, M Violante IEEE Transactions on Nuclear Science 54 (4), 965-970, 2007 | 154 | 2007 |
A new analytical approach to estimate the effects of SEUs in TMR architectures implemented through SRAM-based FPGAs L Sterpone, M Violante IEEE Transactions on Nuclear Science 52 (6), 2217-2223, 2005 | 126 | 2005 |
Using benchmarks for radiation testing of microprocessors and FPGAs H Quinn, WH Robinson, P Rech, M Aguirre, A Barnard, M Desogus, ... IEEE transactions on nuclear science 62 (6), 2547-2554, 2015 | 115 | 2015 |
A new hardware/software platform and a new 1/E neutron source for soft error studies: Testing FPGAs at the ISIS facility M Violante, L Sterpone, A Manuzzato, S Gerardin, P Rech, M Bagatin, ... IEEE Transactions on Nuclear Science 54 (4), 1184-1189, 2007 | 105 | 2007 |
On the evaluation of SEU sensitiveness in SRAM-based FPGAs P Bernardi, MS Reorda, L Sterpone, M Violante Proceedings. 10th IEEE International On-Line Testing Symposium, 115-120, 2004 | 81 | 2004 |
Reconfigurable field programmable gate arrays for mission-critical applications N Battezzati, L Sterpone, M Violante Springer Science & Business Media, 2010 | 80 | 2010 |
Simulation-based analysis of SEU effects in SRAM-based FPGAs M Violante, L Sterpone, M Ceschia, D Bortolato, P Bernardi, MS Reorda, ... IEEE Transactions on Nuclear Science 51 (6), 3354-3359, 2004 | 71 | 2004 |
FlexGripPlus: An improved GPGPU model to support reliability analysis JER Condia, B Du, MS Reorda, L Sterpone Microelectronics Reliability 109, 113660, 2020 | 67 | 2020 |
Analysis of set propagation in flash-based fpgas by means of electrical pulse injection L Sterpone, N Battezzati, V Ferlet-Cavrois IEEE Transactions on Nuclear Science 57 (4), 1820-1826, 2010 | 64 | 2010 |
New techniques for improving the performance of the lockstep architecture for SEEs mitigation in FPGA embedded processors F Abate, L Sterpone, CA Lisboa, L Carro, M Violante IEEE Transactions on Nuclear Science 56 (4), 1992-2000, 2009 | 64 | 2009 |
An error-detection and self-repairing method for dynamically and partially reconfigurable systems MS Reorda, L Sterpone, A Ullah IEEE Transactions on Computers 66 (6), 1022-1033, 2016 | 60 | 2016 |
An analytical model of the propagation induced pulse broadening (PIPB) effects on single event transient in flash-based FPGAs L Sterpone, N Battezzati, FL Kastensmidt, R Chipana IEEE Transactions on Nuclear science 58 (5), 2333-2340, 2011 | 60 | 2011 |
A novel fault tolerant and runtime reconfigurable platform for satellite payload processing L Sterpone, M Porrmann, J Hagemeyer IEEE transactions on computers 62 (8), 1508-1525, 2013 | 59 | 2013 |
FPGAs and parallel architectures for aerospace applications F Kastensmidt, P Rech Soft Errors and Fault-Tolerant Design, 2016 | 57 | 2016 |
Multiple errors produced by single upsets in FPGA configuration memory: a possible solution MS Reorda, L Sterpone, M Violante European Test Symposium (ETS'05), 136-141, 2005 | 54 | 2005 |
Coping with the obsolescence of safety-or mission-critical embedded systems using FPGAs H Guzman-Miranda, L Sterpone, M Violante, MA Aguirre, ... IEEE Transactions on Industrial Electronics 58 (3), 814-821, 2010 | 47 | 2010 |