Sophie Dupuis
Titolo
Citata da
Citata da
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A novel hardware logic encryption technique for thwarting illegal overproduction and hardware trojans
S Dupuis, PS Ba, G Di Natale, ML Flottes, B Rouzeyre
IEEE InternationalOn-Line Testing Symposium (IOLTS), 49-54, 2014
2022014
Secure JTAG implementation using Schnorr protocol
A Das, J Da Rolt, S Ghosh, S Seys, S Dupuis, G Di Natale, ML Flottes, ...
Journal of Electronic Testing 29 (2), 193-209, 2013
422013
Protection against hardware trojans with logic testing: Proposed solutions and challenges ahead
S Dupuis, ML Flottes, G Di Natale, B Rouzeyre
IEEE Design & Test 35 (2), 73-90, 2017
342017
New testing procedure for finding insertion sites of stealthy hardware trojans
S Dupuis, PS Ba, ML Flottes, G Di Natale, B Rouzeyre
Design, Automation & Test in Europe Conference & Exhibition (DATE), 776-781, 2015
312015
On the limitations of logic testing for detecting hardware Trojans horses
ML Flottes, S Dupuis, PS Ba, B Rouzeyre
International Conference on Design & Technology of Integrated Systems iná…, 2015
232015
Hardware trojan prevention using layout-level design approach
PS Ba, M Palanichamy, S Dupuis, ML Flottes, G Di Natale, B Rouzeyre
European Conference on Circuit Theory and Design (ECCTD), 1-4, 2015
172015
Identification of Hardware Trojans triggering signals
S Dupuis, G Di Natale, ML Flottes, B Rouzeyre
First Workshop on Trustworthy Manufacturing and Utilization of Secureá…, 2013
16*2013
Is side-channel analysis really reliable for detecting hardware Trojans?
G Di Natale, S Dupuis, B Rouzeyre
Conference on Design of Circuits and Integrated Systems (DCIS), 238-242, 2012
162012
Stratus: A procedural circuit description language based upon Python
S Belloeil, D Dupuis, C Masson, JP Chaput, H Mehrez
International Conference on Microelectronics (ICM), 261-264, 2007
152007
Logic locking: A survey of proposed methods and evaluation metrics
S Dupuis, ML Flottes
Journal of Electronic Testing 35 (3), 273-291, 2019
142019
A New Secure Stream Cipher for Scan Chain Encryption
M Da Silva, E Valea, ML Flottes, S Dupuis, G Di Natale, B Rouzeyre
IEEE International Verification and Security Workshop (IVSW), 68-73, 2018
132018
Hardware Trust through Layout Filling: a Hardware Trojan Prevention Technique
PS Ba, S Dupuis, M Palanichamy, G Di Natale, B Rouzeyre
IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 254-259, 2016
132016
On the effectiveness of hardware trojan horse detection via side-channel analysis
S Dupuis, G Di Natale, ML Flottes, B Rouzeyre
Information Security Journal: A Global Perspective 22 (5-6), 226-236, 2013
112013
Using outliers to detect stealthy hardware trojan triggering?
PS Ba, S Dupuis, ML Flottes, G Di Natale, B Rouzeyre
IEEE International Verification and Security Workshop (IVSW), 1-6, 2016
92016
Providing confidentiality and integrity in ultra low power iot devices
E Valea, M Da Silva, ML Flottes, G Di Natale, S Dupuis, B Rouzeyre
2019 14th International Conference on Design & Technology of Integratedá…, 2019
72019
SI ECCS: SECure context saving for IoT devices
E Valea, M Da Silva, G Di Natale, ML Flottes, S Dupuis, B Rouzeyre
International Conference on Design & Technology of Integrated Systems Iná…, 2018
62018
A Comprehensive Approach to a Trusted Test Infrastructure
M Merandat, V Reynaud, E Valea, J Quevremont, N Valette, P Maistri, ...
2019 IEEE 4th International Verification and Security Workshop (IVSW), 43-48, 2019
52019
Duplication-based Concurrent Detection of Hardware Trojans in Integrated Circuits
M Palanichamy, PS Ba, S Dupuis, ML Flottes, G Di Natale, B Rouzeyre
Workshop on Trustworthy Manufacturing and Utilization of Secure Devicesá…, 2016
42016
Exploring redundant arithmetics in computer-aided design of arithmetic datapaths
S Belloeil-Dupuis, R Chotin-Avot, H Mehrez
Integration 46 (2), 104-118, 2013
42013
A reference low-complexity structured ASIC
L Noury, S Dupuis, N Fel
IEEE International Symposium on Circuits and Systems (ISCAS), 2709-2712, 2012
42012
Il sistema al momento non pu˛ eseguire l'operazione. Riprova pi¨ tardi.
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