| A CMOS dual-polarized phased-array beamformer utilizing cross-polarization leakage cancellation for 5G MIMO systems J Pang, Z Li, X Luo, J Alvin, R Saengchan, AA Fadila, K Yanagisawa, ... IEEE Journal of Solid-State Circuits 56 (4), 1310-1326, 2021 | 51 | 2021 |
| A Fully Synthesizable Fractional-N MDLL With Zero-Order Interpolation-Based DTC Nonlinearity Calibration and Two-Step Hybrid Phase Offset Calibration B Liu, Y Zhang, J Qiu, HC Ngo, W Deng, K Nakata, T Yoshioka, J Emmei, ... IEEE Transactions on Circuits and Systems I: Regular Papers 68 (2), 603-616, 2020 | 33 | 2020 |
| Digital noise-coupling technique for delta–sigma modulators with segmented quantization L He, Y Zhang, F Long, F Mei, M Yu, F Lin, L Yao, X Jiang IEEE Transactions on Circuits and Systems II: Express Briefs 61 (6), 403-407, 2014 | 29 | 2014 |
| A fully-synthesizable fractional-N injection-locked PLL for digital clocking with triangle/sawtooth spread-spectrum modulation capability in 5-nm CMOS B Liu, Y Zhang, J Qiu, H Huang, Z Sun, D Xu, H Zhang, Y Wang, J Pang, ... IEEE Solid-State Circuits Letters 3, 34-37, 2020 | 23 | 2020 |
| A 1.2 ps-jitter fully-synthesizable fully-calibrated fractional-N injection-locked PLL using true arbitrary nonlinearity calibration technique B Liu, HC Ngo, K Nakata, W Deng, Y Zhang, J Qiu, T Yoshioka, J Emmei, ... 2018 IEEE Custom Integrated Circuits Conference (CICC), 1-4, 2018 | 20 | 2018 |
| A 28-GHz CMOS phased-array beamformer supporting dual-polarized MIMO with cross-polarization leakage cancellation J Pang, Z Li, X Luo, J Alvin, R Saengchan, AA Fadila, K Yanagisawa, ... 2020 IEEE Symposium on VLSI Circuits, 1-2, 2020 | 16 | 2020 |
| A multibit delta–sigma modulator with double noise-shaped segmentation L He, G Zhu, F Long, Y Zhang, L Wang, F Lin, L Yao, X Jiang IEEE Transactions on Circuits and Systems II: Express Briefs 62 (3), 241-245, 2014 | 16 | 2014 |
| An HDL-described fully-synthesizable sub-GHz IoT transceiver with ring oscillator based frequency synthesizer and digital background EVM calibration B Liu, Y Zhang, J Qiu, W Deng, Z Xu, H Zhang, J Pang, Y Wang, R Wu, ... 2019 IEEE Custom Integrated Circuits Conference (CICC), 1-4, 2019 | 15 | 2019 |
| A 32-kHz-Reference 2.4-GHz Fractional-N Oversampling PLL With 200-kHz Loop Bandwidth J Qiu, Z Sun, B Liu, W Wang, D Xu, H Herdian, H Huang, Y Zhang, ... IEEE Journal of Solid-State Circuits 56 (12), 3741-3755, 2021 | 14 | 2021 |
| A Ka-Band SATCOM Transceiver in 65-nm CMOS With High-Linearity TX and Dual-Channel Wide-Dynamic-Range RX for Terrestrial Terminal Y Wang, D You, X Fu, T Nakamura, AA Fadila, T Someya, A Kawaguchi, ... IEEE Journal of Solid-State Circuits 57 (2), 356-370, 2021 | 13 | 2021 |
| A 0.4-ps-jitter− 52-dBc-spur synthesizable injection-locked PLL with self-clocked nonoverlap update and slope-balanced subsampling BBPD B Liu, HC Ngo, K Nakata, W Deng, Y Zhang, J Qiu, T Yoshioka, J Emmei, ... IEEE Solid-State Circuits Letters 2 (1), 5-8, 2019 | 13 | 2019 |
| A CMOS Ka-band SATCOM transceiver with ACI-cancellation enhanced dual-channel low-NF wide-dynamic-range RX and high-linearity TX Y Wang, D You, X Fu, T Nakamura, AA Fadila, T Someya, A Kawaguchi, ... 2020 IEEE Radio Frequency Integrated Circuits Symposium (RFIC), 355-358, 2020 | 9 | 2020 |
| A CMOS 24–30-GHz low-phase-variation variable gain amplifier design for 5G new radio J Qiu, J Pang, B Liu, X Luo, Y Wang, Y Zhang, A Shirane, K Okada IEEE Solid-State Circuits Letters 5, 146-149, 2022 | 5 | 2022 |
| A 29% PAE 1.5 Bit-DSM-based polar transmitter with spur-mitigated injection-locked PLL Y Zhang, B Liu, X Gu, C Wang, K Yanagisawa, J Qiu, Y Wang, J Pang, ... 2020 IEEE Symposium on VLSI Circuits, 1-2, 2020 | 5 | 2020 |
| A 6.5-to-8GHz cascaded dual-fractional-N digital PLL achieving-63.7 dBc fractional spurs with 50MHz reference D Xu, Y Zhang, H Huang, Z Sun, B Liu, AA Fadila, J Qiu, Z Liu, W Wang, ... 2023 IEEE Custom Integrated Circuits Conference (CICC), 1-2, 2023 | 4 | 2023 |
| 19.4 A Small-Satellite-Mounted 256-Element Ka-Band CMOS Phased-Array Transmitter Achieving 63.8 dBm EIRP Under 26.6 W Power Consumption Using Single/Dual Circular Polarization … D You, X Fu, X Wang, Y Gao, W Wang, J Sakamaki, H Herdian, S Kato, ... 2023 IEEE International Solid-State Circuits Conference (ISSCC), 298-300, 2023 | 3 | 2023 |
| A 1-bit-DSM-based digital polar power amplifier supporting 1024-QAM Y Zhang, B Liu, J Qiu, A Shirane, K Okada IEEE Solid-State Circuits Letters 5, 130-133, 2022 | 3 | 2022 |
| A 2.95 mW/element Ka-band CMOS phased-array receiver utilizing on-chip distributed radiation sensors in low-earth-orbit small satellite constellation X Fu, D You, X Wang, M Ide, Y Zhang, J Sakamaki, AA Fadila, Z Li, ... 2023 IEEE International Solid-State Circuits Conference (ISSCC), 18-20, 2023 | 2 | 2023 |
| A 32kHz-reference 2.4 GHz fractional-N nonuniform oversampling PLL with gain-boosted PD and loop-gain calibration J Qiu, W Wang, Z Sun, B Liu, Y Zhang, D Xu, H Huang, AA Fadila, Z Liu, ... 2023 IEEE International Solid-State Circuits Conference (ISSCC), 80-82, 2023 | 2 | 2023 |
| A Low-Power 256-Element -Band CMOS Phased-Array Receiver With On-Chip Distributed Radiation Sensors for Small Satellite Constellations X Fu, D You, X Wang, Y Wang, CJ Mayeda, Y Gao, M Ide, Y Zhang, ... IEEE Journal of Solid-State Circuits, 2023 | 1 | 2023 |
Kenichi OkadaTokyo Institute of TechnologyVerified email at ee.e.titech.ac.jp
