Segui
Michael Chu
Michael Chu
Senior Member of Technical Staff, AMD Research
Email verificata su umich.edu
Titolo
Citata da
Citata da
Anno
Hybrid transactional memory
S Kumar, M Chu, CJ Hughes, P Kundu, A Nguyen
Proceedings of the eleventh ACM SIGPLAN symposium on Principles and practice …, 2006
3842006
An architecture framework for transparent instruction set customization in embedded processors
N Clark, J Blome, M Chu, S Mahlke, S Biles, K Flautner
32nd International Symposium on Computer Architecture (ISCA'05), 272-283, 2005
2112005
Region-based hierarchical operation partitioning for multicluster processors
M Chu, K Fan, S Mahlke
Proceedings of the ACM SIGPLAN 2003 conference on Programming language …, 2003
952003
Data access partitioning for fine-grain parallelism on multicore architectures
M Chu, R Ravindran, S Mahlke
40th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO …, 2007
762007
Systematic register bypass customization for application-specific processors
K Fan, N Clark, M Chu, KV Manjunath, R Ravindran, M Smelyanskiy, ...
Proceedings IEEE International Conference on Application-Specific Systems …, 2003
382003
Compiler-managed partitioned data caches for low power
R Ravindran, M Chu, S Mahlke
ACM SIGPLAN Notices 42 (7), 237-247, 2007
342007
Compiler-directed data partitioning for muiticluster processors
ML Chu, SA Mahlke
International Symposium on Code Generation and Optimization (CGO'06), 11 pp.-220, 2006
272006
InFO_SoW (system-on-wafer) for high performance computing
SR Chun, TH Kuo, HY Tsai, CS Liu, CT Wang, JS Hsieh, TS Lin, T Ku, ...
2020 IEEE 70th Electronic Components and Technology Conference (ECTC), 1-6, 2020
222020
High-level programming model abstractions for processing in memory
ML Chu, N Jayasena, DP Zhang, M Ignatowski
Workshop on Near-Data Processing, 2013
222013
Runtime agnostic representation of user code for execution with selected execution runtime
K Varadarajan, ML Chu
US Patent 9,658,890, 2017
162017
Extended task queuing: Active messages for heterogeneous systems
M LeBeane, B Potter, A Pan, A Dutu, V Agarwala, W Lee, D Majeti, ...
SC'16: Proceedings of the International Conference for High Performance …, 2016
162016
FLASH: Foresighted latency-aware scheduling heuristic for processors with customized datapaths
M Kudlur, K Fan, M Chu, R Ravindran, N Clark, S Mahlke
International Symposium on Code Generation and Optimization, 2004. CGO 2004 …, 2004
152004
Verification of a dataflow representation of a program through static type-checking
K Varadarajan, ML Chu
US Patent 9,760,348, 2017
142017
Taming irregular applications via advanced dynamic parallelism on GPUs
J Zhang, AM Aji, ML Chu, H Wang, W Feng
Proceedings of the 15th ACM International Conference on Computing Frontiers …, 2018
132018
Adaptive task aggregation for high-performance sparse solvers on GPUs
AE Helal, AM Aji, ML Chu, BM Beckmann, W Feng
2019 28th International Conference on Parallel Architectures and Compilation …, 2019
122019
Declarative programming model with a native programming language
K Varadarajan, ML Chu
US Patent 9,600,250, 2017
122017
Dynamic data and compute resource elasticity
K Varadarajan, ML Chu
US Patent 9,600,255, 2017
122017
Automatic synthesis of customized local memories for multicluster application accelerators
M Kudlur, K Fan, M Chu, S Mahlke
Proceedings. 15th IEEE International Conference on Application-Specific …, 2004
82004
GPGPU support in Chapel with the Radeon Open Compute platform
ML Chu, AM Aji, D Lowell, K Hamidouche
CHIUW, 2017
42017
Cost-Sensitive Operation Partitioning for Synthesizing Custom Multicluster Datapath Architectures
ML Chu, KC Fan, RA Ravindran, SA Mahlke
Proc. 2nd Workshop on Application Specific Processors, 40-47, 2003
42003
Il sistema al momento non può eseguire l'operazione. Riprova più tardi.
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