Florian Giesemann
Florian Giesemann
Verified email at ims.uni-hannover.de
Title
Cited by
Cited by
Year
VLIW architecture optimization for an efficient computation of stereoscopic video applications
G Payá-Vayá, J Martín-Langerwerf, C Banz, F Giesemann, P Pirsch, ...
Green Circuits and Systems (ICGCS), 2010 International Conference on, 457-462, 2010
152010
Instruction merging to increase parallelism in VLIW architectures
G Payá-Vayá, J Martín-Langerwerf, F Giesemann, H Blume, P Pirsch
2009 International Symposium on System-on-Chip, 143-146, 2009
72009
Performance evaluation of the Intel Xeon Phi manycore architecture using parallel video-based driver assistance algorithms
OJ Arndt, D Becker, F Giesemann, G Payá-Vayá, C Bartels, H Blume
2014 International Conference on Embedded Computer Systems: Architectures …, 2014
62014
A comprehensive ASIC/FPGA prototyping environment for exploring embedded processing systems for advanced driver assistance applications
F Giesemann, G Payá-Vayá, H Blume, M Limmer, W Ritter
2014 International Conference on Embedded Computer Systems: Architectures …, 2014
52014
Exploring Dynamic Reconfigurable CORDIC Co-Processors Tightly Coupled with a VLIW-SIMD Soft-Processor Architecture
S Nolting, G Payá-Vayá, F Giesemann, H Blume
International Symposium on Applied Reconfigurable Computing, 401-410, 2015
32015
Using a genetic algorithm approach to reduce register file pressure during instruction scheduling
F Giesemann, G Payá-Vayá, L Gerlach, H Blume, F Pflug, G von Voigt
2017 International Conference on Embedded Computer Systems: Architectures …, 2017
22017
Dynamic Self-Reconfiguration of a MIPS-Based Soft-Processor Architecture
S Nolting, G Payá-Vayá, F Giesemann, H Blume, S Niemann, ...
2016 IEEE International Parallel and Distributed Processing Symposium …, 2016
22016
A Hardware/Software Environment for Specializing Dynamic Reconfigurable Generic VLIW-SIMD ASIP Architecture
F Giesemann, G Payá-Vayá, H Blume
22012
Evolutionary Algorithms for Instruction Scheduling, Operation Merging, and Register Allocation in VLIW Compilers
F Giesemann, L Gerlach, G Payá-Vayá
Journal of Signal Processing Systems, 1-24, 2020
2020
Dynamic self-reconfiguration of a MIPS-based soft-core processor architecture
S Nolting, G Payá-Vayá, F Giesemann, H Blume, S Niemann, ...
Journal of Parallel and Distributed Computing, 2017
2017
Application-specific soft-core vector processor for advanced driver assistance systems
S Nolting, F Giesemann, J Hartig, A Schmider, G Paya-Vaya
2017 27th International Conference on Field Programmable Logic and …, 2017
2017
The DESERVE Platform: A Flexible Development Framework to Seemlessly Support the ADAS Development Levels
F Badstübner, R Ködel, W Maurer, M Kunert, A Rolfsmeier, J Pérez, ...
Towards a Common Software/Hardware Methodology for Future Advanced Driver …, 2017
2017
Deep Learning for Advanced Driver Assistance Systems
F Giesemann, G Paya-Vaya, H Blume, M Limmer, WR Ritter
Towards a Common Software/Hardware Methodology for Future Advanced Driver …, 2017
2017
De Zeeuw, Chris I., 137 Deroui, Hamza, 213 Desnos, Karol, 213 Doclo, Simon, 88 Dragic, Leon, 286
G Agosta, MA Aguilar, Z Al-Ars, N Alachiotis, P Alefragis, MAZ Alves, ...
Platform System Architecture–2nd Release
F Badstübner, R Ködel, W Maurer, M Kunert, A Rolfsmeier, J Pérez, ...
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