Giulio Gambardella
Giulio Gambardella
Research Scientist, Xilinx
Verified email at polito.it
TitleCited byYear
Finn: A framework for fast, scalable binarized neural network inference
Y Umuroglu, NJ Fraser, G Gambardella, M Blott, P Leong, M Jahre, ...
Proceedings of the 2017 ACM/SIGDA International Symposium on Field …, 2017
3292017
Scaling binarized neural networks on reconfigurable logic
NJ Fraser, Y Umuroglu, G Gambardella, M Blott, P Leong, M Jahre, ...
Proceedings of the 8th Workshop and 6th Workshop on Parallel Programming and …, 2017
312017
A cloud-based Cyber-Physical System for environmental monitoring
T Sanislav, G Mois, S Folea, L Miclea, G Gambardella, P Prinetto
2014 3rd Mediterranean Conference on Embedded Computing (MECO), 6-9, 2014
232014
An area-efficient 2-D convolution implementation on FPGA for space applications
S Di Carlo, G Gambardella, M Indaco, D Rolfo, G Tiotto, P Prinetto
Design and Test Workshop (IDT), 2011 IEEE 6th International, 88-92, 2011
232011
A software-based self test of CUDA Fermi GPUs
S Di Carlo, G Gambardella, M Indaco, I Martella, P Prinetto, D Rolfo, ...
Test Symposium (ETS), 2013 18th IEEE European, 1-6, 2013
182013
Fault mitigation strategies for CUDA GPUs
S Di Carlo, G Gambardella, I Martella, P Prinetto, D Rolfo, P Trotta
Test Conference (ITC), 2013 IEEE International, 1-8, 2013
162013
FINN-R: An End-to-End Deep-Learning Framework for Fast Exploration of Quantized Neural Networks
M Blott, TB Preußer, NJ Fraser, G Gambardella, K O’brien, Y Umuroglu, ...
ACM Transactions on Reconfigurable Technology and Systems (TRETS) 11 (3), 16, 2018
152018
FINN-L: Library Extensions and Design Trade-off Analysis for Variable Precision LSTM Networks on FPGAs
V Rybalkin, A Pappalardo, MM Ghaffar, G Gambardella, N Wehn, M Blott
2018 28th International Conference on Field Programmable Logic and …, 2018
152018
A novel methodology to increase fault tolerance in autonomous FPGA-based systems
S Di Carlo, G Gambardella, P Prinetto, D Rolfo, P Trotta, A Vallero
2014 IEEE 20th International On-Line Testing Symposium (IOLTS), 87-92, 2014
152014
Inference of quantized neural networks on heterogeneous all-programmable devices
TB Preußer, G Gambardella, N Fraser, M Blott
Design, Automation & Test in Europe Conference & Exhibition (DATE), 2018 …, 2018
92018
SA-FEMIP: A Self-Adaptive Features Extractor and Matcher IP-Core Based on Partially Reconfigurable FPGAs for Space Applications
S Di Carlo, G Gambardella, P Prinetto, D Rolfo, P Trotta
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 23 (10 …, 2015
92015
Compressing Low Precision Deep Neural Networks Using Sparsity-Induced Regularization in Ternary Networks
J Faraone, N Fraser, G Gambardella, M Blott, PHW Leong
International Conference on Neural Information Processing, 393-404, 2017
72017
Increasing the robustness of CUDA Fermi GPU-based systems
S Di Carlo, G Gambardella, M Indaco, I Martella, P Prinetto, D Rolfo, ...
2013 IEEE 19th International On-Line Testing Symposium (IOLTS), 234-235, 2013
72013
Scaling Neural Network Performance through Customized Hardware Architectures on Reconfigurable Logic
M Blott, TB Preußer, N Fraser, G Gambardella, K O'Brien, Y Umuroglu, ...
Computer Design (ICCD), 2017 IEEE International Conference on, 419-422, 2017
62017
SATTA: A Self-Adaptive Temperature-Based TDF Awareness Methodology for Dynamically Reconfigurable FPGAs
SD Carlo, G Gambardella, P Prinetto, D Rolfo, P Trotta
ACM Transactions on Reconfigurable Technology and Systems (TRETS) 8 (1), 1, 2015
62015
FEMIP: A high performance FPGA-based features extractor & matcher for space applications
S Di Carlo, G Gambardella, P Prinetto, D Rolfo, P Trotta, P Lanza
Field Programmable Logic and Applications (FPL), 2013 23rd International …, 2013
62013
Dependable Dynamic Partial Reconfiguration with minimal area & time overheads on Xilinx FPGAS
S Di Carlo, G Gambardella, M Indaco, P Prinetto, D Rolfo, P Trotta
Field Programmable Logic and Applications (FPL), 2013 23rd International …, 2013
62013
On Enhancing Fault Injection's Capabilities and Performances for Safety Critical Systems
S Di Carlo, G Gambardella, P Prinetto, F Reichenbach, T Løkstad, G Rafiq
Digital System Design (DSD), 2014 17th Euromicro Conference on, 583-590, 2014
52014
Safe: a self adaptive frame enhancer fpga-based ip-core for real-time space applications
S Di Carlo, G Gambardella, P Lanza, PE Prinetto, D Rolfo, P Trotta
IEEE Computer Society, 2013
52013
MarciaTesta: An Automatic Generator of Test Programs for Microprocessors' Data Caches
S Di Carlo, G Gambardella, M Indaco, D Rolfo, P Prinetto
2011 Asian Test Symposium, 401-406, 2011
42011
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