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YB Kim
YB Kim
Qualcomm
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Year
A novel design methodology to optimize the speed and power of the CNTFET circuits
YB Kim, YB Kim, F Lombardi
2009 52nd IEEE international midwest symposium on circuits and systems, 1130 …, 2009
1332009
Fault tolerant source routing for network-on-chip
YB Kim, YB Kim
22nd IEEE International Symposium on Defect and Fault-Tolerance in VLSI …, 2007
842007
A low power 8T SRAM cell design technique for CNFET
YB Kim, YB Kim, F Lombardi, YJ Lee
2008 International SoC Design Conference 1, I-176-I-179, 2008
462008
Low power 8T SRAM using 32nm independent gate FinFET technology
YB Kim, YB Kim, F Lombardi
2008 IEEE International SOC Conference, 247-250, 2008
282008
High speed and low power transceiver design with CNFET and CNT bundle interconnect
YB Kim, YB Kim
23rd IEEE International SOC Conference, 152-157, 2010
252010
New SRAM cell design for low power and high reliability using 32nm independent gate FinFET technology
YB Kim, YB Kim, F Lombardi
2008 IEEE International Workshop on Design and Test of Nano Devices …, 2008
252008
Design methodology based on carbon nanotube field effect transistor (CNFET)
YB Kim
Northeastern University, 2010
172010
IEEE Trans Nanotechnol
S Lin, YB Kim, F Lombardi
IEEE Trans. Nanotechnol 4, 481-489, 2005
172005
Balanced redundancy utilization in embedded memory cores for dependable systems
M Choi, N Park, F Lombardi, YB Kim, V Piuri
17th IEEE International Symposium on Defect and Fault Tolerance in VLSI …, 2002
152002
Evaluating the yield of repairable SRAMs for ATE
M Ottavi, L Schiano, X Wang, YB Kim, FJ Meyer, F Lombardi
IEEE transactions on instrumentation and measurement 55 (5), 1704-1712, 2006
92006
Error rate reduction in DNA self-assembly by non-constant monomer concentrations and profiling
B Jang, YB Kim, F Lombardi
2007 Design, Automation & Test in Europe Conference & Exhibition, 1-6, 2007
72007
A low power methodology for portable electronics
DW Kang, JT Doyle, M Hartman, S Dhar, MB Dermody, RC Woolf, ...
International Symposium on Advanced Radio Technologies, 109-116, 2005
62005
A technique for low power dynamic circuit design in 32nm double-gate FinFET technology
YB Kim, YB Kim, F Lombardi
2008 51st Midwest Symposium on Circuits and Systems, 779-782, 2008
52008
Guest editors' introduction: clockless VLSI systems
S Hassoun, YB Kim, F Lombardi
IEEE Design & Test of Computers 20 (06), 5-8, 2003
42003
A low power CMOS CORDIC processor design for wireless telecommunication
YB Kim, YB Kim, JT Doyle
2007 50th Midwest Symposium on Circuits and Systems, 1336-1339, 2007
32007
Design and noise analysis of 8Gb/s capacitive low power and high speed 4-PWAM transceiver
YB Kim, YB Kim
2010 53rd IEEE International Midwest Symposium on Circuits and Systems, 785-788, 2010
22010
8Gb/s capacitive low power and high speed 4-PWAM transceiver design
YB Kim, YB Kim, F Lombardi
Proceedings of the 20th symposium on Great lakes symposium on VLSI, 33-38, 2010
12010
Error tolerant DNA self-assembly by link-fracturing
YB Kim, YB Kim, F Lombardi
2009 International SoC Design Conference (ISOCC), 75-78, 2009
2009
A Universal Gate for Combinational Design of QCA Circuits
YB Kim, YB Kim, F Lombardi
대한전자공학회 ISOCC, 92-95, 2009
2009
An Asynchronous NoC Router Architecture Supporting Quality-of-Service
Y Kim, YB Kim
Fifth Annual Boston Area Architecture Workshop, 25, 2007
2007
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