Samaneh Ghandali
Title
Cited by
Cited by
Year
Off-Line Persian Signature Identification and Verification Based on Image Registration and Fusion.
S Ghandali, ME Moghaddam
Journal of Multimedia 4 (3), 2009
562009
A method for off-line Persian signature identification and verification using DWT and image fusion
S Ghandali, ME Moghaddam
2008 IEEE International Symposium on Signal Processing and Information …, 2008
322008
A Design Methodology for Stealthy Parametric Trojans and Its Application to Bug Attacks
S Ghandali, GT Becker, D Holcomb, C Paar
18th International Conference on Cryptographic Hardware and Embedded Systems …, 2016
312016
The first thorough side-channel hardware trojan
M Ender, S Ghandali, A Moradi, C Paar
International Conference on the Theory and Application of Cryptology and …, 2017
232017
Logic Debugging of Arithmetic Circuits
S Ghandali, C Yu, D Liu, W Brown, M Ciesielski
IEEE Computer Society Annual Symposium on VLSI(ISVLSI), 2015
202015
Automatic High-level Data-flow Synthesis and Optimization of Polynomial Datapaths Using Functional Decomposition
S Ghandali, B Alizadeh, M Fujita, Z Navabi
IEEE Transactions on Computers 64 (6), 1579 - 1593, 2015
92015
Survey on applications of formal methods in reverse engineering and intellectual property protection
S Keshavarz, C Yu, S Ghandali, X Xu, D Holcomb
Journal of Hardware and Systems Security 2 (3), 214-224, 2018
62018
Polynomial datapath synthesis and optimization based on vanishing polynomial over Z2mand algebraic techniques
S Ghandali, B Alizadeh, Z Navabi, M Fujita
Tenth ACM/IEEE International Conference on Formal Methods and Models for …, 2012
62012
A secure joint wavelet based steganography and secret sharing method
MJ Khosravi, S Ghandali
2011 7th International Conference on Information Assurance and Security (IAS …, 2011
62011
Side-channel hardware trojan for provably-secure SCA-protected implementations
S Ghandali, T Moos, A Moradi, C Paar
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 28 (6 …, 2020
52020
Low Power Scheduling in High-level Synthesis using Dual-Vth Library
S Ghandali, B Alizadeh, Z Navabi
16th International Symposium on Quality Electronic Design (ISQED), 507 - 511, 2015
52015
RTL datapath optimization using system-level transformations
S Ghandali, B Alizadeh, M Fujita, Z Navabi
Fifteenth International Symposium on Quality Electronic Design, 309-316, 2014
32014
Temperature-Based Hardware Trojan For Ring-Oscillator-Based TRNGs
S Ghandali, D Holcomb, C Paar
arXiv preprint arXiv:1910.00735, 2019
12019
Stealthy parametric hardware Trojans in VLSI Circuits
S Ghandali
University of Massachusetts Amherst, 2019
2019
Soft-error-immune communication network using unbalanced protection selection
M Najafi, S Ghandali, Z Navabi
The 16th CSI International Symposium on Computer Architecture and Digital …, 2012
2012
A new system for offline signature identification and verification
S Ghandali, M Ebrahimi Moghaddam, M Javad Khosravi
International Journal of Signal and Imaging Systems Engineering 5 (2), 123-131, 2012
2012
Memory Circuits A 0.506-pJ 16-kb 8T SRAM With Vertical Read Wordlines and Selective Dual Split Power Lines.....................
L Lu, T Yoo, VL Le, TTH Kim, MA Qureshi, J Park, S Kim, C McCullough, ...
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