Christian Pilato
Christian Pilato
Verified email at polimi.it - Homepage
TitleCited byYear
A survey and evaluation of FPGA high-level synthesis tools
R Nane, VM Sima, C Pilato, J Choi, B Fort, A Canis, YT Chen, H Hsiao, ...
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2015
2122015
Ant colony heuristic for mapping and scheduling tasks and communications on heterogeneous embedded systems
F Ferrandi, PL Lanzi, C Pilato, D Sciuto, A Tumeo
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2010
1372010
Bambu: A modular framework for the high level synthesis of memory-intensive applications
C Pilato, F Ferrandi
2013 23rd International Conference on Field programmable Logic and …, 2013
542013
Ant colony optimization for mapping and scheduling in heterogeneous multiprocessor systems
A Tumeo, C Pilato, F Ferrandi, D Sciuto, PL Lanzi
2008 International Conference on Embedded Computer Systems: Architectures …, 2008
382008
Hartes: Hardware-software codesign for heterogeneous multicore platforms
K Bertels, VM Sima, Y Yankova, G Kuzmanov, W Luk, G Coutinho, ...
IEEE micro 30 (5), 88-97, 2010
322010
Mapping and scheduling of parallel C applications with ant colony optimization onto heterogeneous reconfigurable MPSoCs
F Ferrandi, C Pilato, D Sciuto, A Tumeo
2010 15th Asia and South Pacific Design Automation Conference (ASP-DAC), 799-804, 2010
282010
HW/SW methodologies for synchronization in FPGA multiprocessors
A Tumeo, C Pilato, G Palermo, F Ferrandi, D Sciuto
Proceedings of the ACM/SIGDA international symposium on Field programmable …, 2009
262009
A design methodology to implement memory accesses in high-level synthesis
C Pilato, F Ferrandi, D Sciuto
2011 Proceedings of the Ninth IEEE/ACM/IFIP International Conference on …, 2011
252011
A multi-objective genetic algorithm for design space exploration in high-level synthesis
F Ferrandi, PL Lanzi, D Loiacono, C Pilato, D Sciuto
2008 IEEE Computer Society Annual Symposium on VLSI, 417-422, 2008
252008
An evolutionary approach to area-time optimization of FPGA designs
F Ferrandi, PL Lanzi, G Palermo, C Pilato, D Sciuto, A Tumeo
2007 International Conference on Embedded Computer Systems: Architectures …, 2007
222007
A runtime adaptive controller for supporting hardware components with variable latency
C Pilato, VG Castellana, S Lovergine, F Ferrandi
2011 NASA/ESA Conference on Adaptive Hardware and Systems (AHS), 153-160, 2011
212011
An FPGA-based infrastructure for fine-grained DVFS analysis in high-performance embedded systems
P Mantovani, EG Cota, K Tien, C Pilato, G Di Guglielmo, K Shepard, ...
Proceedings of the 53rd Annual Design Automation Conference, 157, 2016
182016
Speeding-up expensive evaluations in high-level synthesis using solution modeling and fitness inheritance
C Pilato, D Loiacono, A Tumeo, F Ferrandi, PL Lanzi, D Sciuto
Computational intelligence in expensive optimization problems, 701-723, 2010
182010
System-level optimization of accelerator local memory for heterogeneous systems-on-chip
C Pilato, P Mantovani, G Di Guglielmo, LP Carloni
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2016
152016
System-level memory optimization for high-level synthesis of component-based SoCs
C Pilato, P Mantovani, G Di Guglielmo, LP Carloni
Proceedings of the 2014 International Conference on Hardware/Software …, 2014
152014
Improving evolutionary exploration to area-time optimization of FPGA designs
C Pilato, A Tumeo, G Palermo, F Ferrandi, PL Lanzi, D Sciuto
Journal of Systems Architecture 54 (11), 1046-1057, 2008
152008
Handling large data sets for high-performance embedded applications in heterogeneous systems-on-chip
P Mantovani, EG Cota, C Pilato, G Di Guglielmo, LP Carloni
Proceedings of the International Conference on Compilers, Architectures and …, 2016
142016
Ant colony optimization for mapping, scheduling and placing in reconfigurable systems
F Ferrandi, PL Lanzi, C Pilato, D Sciuto, A Tumeo
2013 NASA/ESA Conference on Adaptive Hardware and Systems (AHS-2013), 47-54, 2013
142013
On the automatic integration of hardware accelerators into FPGA-based embedded systems
C Pilato, A Cazzaniga, G Durelli, A Otero, D Sciuto, MD Santambrogio
22nd International Conference on Field Programmable Logic and Applications …, 2012
142012
Automatic run-time manager generation for reconfigurable MPSoC architectures
G Durelli, C Pilato, A Cazzaniga, D Sciuto, MD Santambrogio
7th International Workshop on Reconfigurable and Communication-Centric …, 2012
132012
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Articles 1–20