Implementation of Boolean and Arithmetic Functions with 8T SRAM Cell for In-Memory Computation AK Rajput, M Pattanaik 2020 International Conference for Emerging Technology (INCET), 1-5, 2020 | 24 | 2020 |
Low power boolean logic circuits using reversible logic gates AK Rajput, S Chouhan, M Pattanaik 2019 International Conference on Advances in Computing, Communication and …, 2019 | 9 | 2019 |
Local bit-line shared pass-gate 8T SRAM based energy efficient and reliable In-Memory Computing architecture AK Rajput, M Pattanaik, G Kaushal Microelectronics Journal 129, 105569, 2022 | 8 | 2022 |
Energy efficient 9T SRAM with R/W margin enhanced for beyond Von-Neumann computation AK Rajput, M Pattanaik 2020 24th International Symposium on VLSI Design and Test (VDAT), 1-4, 2020 | 8 | 2020 |
Local bit line 8T SRAM based in-memory computing architecture for energy-efficient linear error correction codec implementation AK Rajput, M Pattanaik Microelectronics Journal 137, 105795, 2023 | 7 | 2023 |
Network on chip for consumer electronics devices: An architectural and performance exploration of synchronous and asynchronous network-on-chip-based systems AK Swain, AK Rajput, KK Mahapatra IEEE Consumer Electronics Magazine 8 (3), 50-54, 2019 | 7 | 2019 |
Advanced patient matching: Recognizable patient view for decision support in healthcare using big data analytics P Johri, T Singh, A Yadav, AK Rajput 2017 International Conference on Infocom Technologies and Unmanned Systems …, 2017 | 6 | 2017 |
An Energy-Efficient Hybrid SRAM-Based In-Memory Computing Macro for Artificial Intelligence Edge Devices AK Rajput, AK Tiwari, M Pattanaik Circuits, Systems, and Signal Processing 42 (6), 3589-3616, 2023 | 5 | 2023 |
An efficient model for information gain of sequential pattern from web logs based on dynamic weight constraint DK Jha, A Rajput, M Singh, A Tomar 2010 International Conference on Computer Information Systems and Industrial …, 2010 | 5 | 2010 |
An energy-efficient 10T SRAM in-memory computing macro for artificial intelligence edge processor AK Rajput, M Pattanaik, G Kaushal Memories-Materials, Devices, Circuits and Systems 5, 100076, 2023 | 4 | 2023 |
Parametric performance analysis of synchronous and asynchronous heterogeneous network on chip AK Swain, AK Rajput, K Mahapatra 2016 IEEE International Symposium on Nanoelectronic and Information Systems …, 2016 | 3 | 2016 |
GAAFET based SRAM Cell to Enhance Stability for Low Power Applications A Kumar, M Pattanaik, P Srivastava, AK Rajput Silicon, 1-12, 2022 | 2 | 2022 |
Quality driven energy aware approximated core transform architecture for hevc standard N Arya, AK Rajput, M Pattanaik, GK Sharma VLSI Design and Test: 23rd International Symposium, VDAT 2019, Indore, India …, 2019 | 2 | 2019 |
An Energy-Efficient and Robust 10T SRAM Based in-Memory Computing Architecture N Srivastava, AK Rajput, M Pattanaik, G Kaushal 2023 36th International Conference on VLSI Design and 2023 22nd …, 2023 | 1 | 2023 |
EASM: An efficient AttnSleep model for sleep Apnea detection from EEG signals M Singh, S Chauhan, AK Rajput, I Verma, AK Tiwari Multimedia Tools and Applications, 1-19, 2024 | | 2024 |
1ABV-IIITM, Gwalior 2Affiliation not available A Rajput, M Pattanaik, G Kaushal, SK Vishvakarma | | 2023 |
Low Noise Amplifier for Health Monitoring R Raj, AK Rajput, G Kaushal 2021 IEEE Bombay Section Signature Conference (IBSSC), 1-6, 2021 | | 2021 |
Local Bit-Line Sharing Robust Dual-Port 8T SRAM With Virtual VSS for Energy-Efficient In-Memory Computing Architecture AK Rajput, M Pattanaik, G Kaushal TechRxiv, 2021 | | 2021 |
Semi Analytical Modelling for Drain-Induced Barrier Lowering Reduction in Dual-Metal Gate all Around FET A Kumar, AK Rajput, M Pattanaik, P Srivastava | | 2021 |
Performance Analysis of Dual Metal Nitride Oxide GAAFET based Common Source Amplifier A Kumar, AK Rajput, M Pattanaik, P Srivast Indian Institute of Information Technology and Management, 2021 | | 2021 |