Zeljko Zilic

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	All	Since 2016
Citations	4076	1210
h-index	34	17
i10-index	100	35

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Co-authors

Marc BouléSenior Lecturer (maître d'enseignement), Ecole de technologie superieureVerified email at etsmtl.ca
Atena Roshan Fekr, Ph.D.Affiliate Scientist, Toronto Rehabilitation Institute (TRI), University Health Network (UHN)Verified email at uhn.ca
Majid JanidarmianMcGill UniversityVerified email at mail.mcgill.ca
Mark Neishabouri, Ph.DDesign Verification Engineer, FacebookVerified email at fb.com
Mitch GusatIBM Zurich Research LabVerified email at zurich.ibm.com
Guy LemieuxFaculty of Applied Science, University of British Columbia, V6T 1Z4Verified email at ece.ubc.ca
Junchao WangAssistant Professor, Department of Biomedical Engineering, Shantou UniversityVerified email at stu.edu.cn
Stephen BrownUniversity of TorontoVerified email at eecg.toronto.edu
Sinisa SrbljicProfessor of Computer Science, University of Zagreb, Faculty of Electrical Engineering and ComputingVerified email at fer.hr
Orran KriegerProfessor ECE, Boston UniversityVerified email at bu.edu
Omid Sarbishei, Ph.D.Research and Development Lead at Motsai, Saint Bruno, QC, CanadaVerified email at mail.mcgill.ca
Michael StummUniversity of TorontoVerified email at eecg.toronto.edu
Anastasios AlexandridisPhD CandidateVerified email at mail.mcgill.ca
Kaining HanAssistant Professor, University of Electronic Science and Technology of ChinaVerified email at uestc.edu.cn
Amirhossein ShahshahaniMcGill university, CanadaVerified email at mail.mcgill.ca
Bojan MihajlovićSynopsys Inc.Verified email at mail.mcgill.ca
Claude ThibeaultProfessor, EE Dept, Ecole de technologie superieureVerified email at etsmtl.ca
Ben NahillMIT Lincoln LaboratoryVerified email at mit.edu
Sharmistha BhadraAssistant Professor, McGill UniversityVerified email at mcgill.ca
Brett H MeyerMcGill UniversityVerified email at mcgill.ca

Zeljko Zilic

Professor of Electrical and Computer Engineering

Verified email at mcgill.ca - Homepage

Computer Engineering Electronic Design Automation Embedded Systems


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Assertion checkers in verification, silicon debug and in-field diagnosis M Boule, JS Chenard, Z Zilic 8th International Symposium on Quality Electronic Design (ISQED'07), 613-620, 2007	210	2007
Adding debug enhancements to assertion checkers for hardware emulation and silicon debug M Boulé, JS Chenard, Z Zilic 2006 International Conference on Computer Design, 294-299, 2006	180	2006
A hybrid ring/mesh interconnect for network-on-chip using hierarchical rings for global routing S Bourduas, Z Zilic First International Symposium on Networks-on-Chip (NOCS'07), 195-204, 2007	132	2007
Using BDDs to Design ULMs for FPGAs Z Zilic, ZG Vranesic Proceedings of the 1996 ACM fourth international symposium on Field …, 1996	128	1996
A comprehensive analysis on wearable acceleration sensors in human activity recognition M Janidarmian, A Roshan Fekr, K Radecka, Z Zilic Sensors 17 (3), 529, 2017	115	2017
Automata-based assertion-checker synthesis of PSL properties M Boule, Z Zilic ACM Transactions on Design Automation of Electronic Systems (TODAES) 13 (1 …, 2008	114	2008
Generating hardware assertion checkers M Boulé, Z Zilic Springer, 2008	113	2008
Incorporating efficient assertion checkers into hardware emulation M Boulé, Z Zilic 2005 International Conference on Computer Design, 221-228, 2005	84	2005
The NUMAchine multiprocessor ZG Vranesic, S Brown, M Stumm, S Caranci, A Grbic, R Grindley, M Gusat, ... University of Toronto. Computer Systems Research Institute, 1995	80	1995
Architectures of increased availability wireless sensor network nodes MW Chiang, Z Zilic, K Radecka, JS Chenard 2004 International Conferce on Test, 1232-1241, 2004	77	2004
Efficient automata-based assertion-checker synthesis of PSL properties M Boulé, Z Zilic 2006 IEEE International High Level Design Validation and Test Workshop, 69-76, 2006	76	2006
Echo cancellation in IP networks J Radecki, Z Zilic, K Radecka The 2002 45th Midwest Symposium on Circuits and Systems, 2002. MWSCAS-2002 …, 2002	75	2002
FPGA emulation of quantum circuits AU Khalid, Z Zilic, K Radecka IEEE International Conference on Computer Design: VLSI in Computers and …, 2004	69	2004
Automata unit, a tool for designing checker circuitry and a method of manufacturing hardware circuitry incorporating checker circuitry Z Zilic, M Boulé US Patent 8,024,691, 2011	67	2011
Reliability aware NoC router architecture using input channel buffer sharing MH Neishaburi, Z Zilic Proceedings of the 19th ACM Great Lakes symposium on VLSI, 511-516, 2009	60	2009
A laboratory setup and teaching methodology for wireless and mobile embedded systems JS Chenard, Z Zilic, M Prokic IEEE Transactions on Education 51 (3), 378-384, 2008	57	2008
Migration and economy: global and local dynamics L Trager Rowman Altamira, 2005	54	2005
Dynamic clock management for low power applications in FPGAs I Brynjolfson, Z Zilic Proceedings of the IEEE 2000 Custom Integrated Circuits Conference (Cat. No …, 2000	51	2000
A medical cloud-based platform for respiration rate measurement and hierarchical classification of breath disorders AR Fekr, M Janidarmian, K Radecka, Z Zilic Sensors 14 (6), 11204-11224, 2014	48	2014
Multiple-valued logic in FPGAs Z Zilic, ZG Vranesic Proceedings of 36th Midwest Symposium on Circuits and Systems, 1553-1556, 1993	47	1993

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