H.-S. Philip Wong
H.-S. Philip Wong
Professor of Electrical Engineering, Stanford University
Verified email at stanford.edu
TitleCited byYear
Metal–oxide RRAM
HSP Wong, HY Lee, S Yu, YS Chen, Y Wu, PS Chen, B Lee, FT Chen, ...
Proceedings of the IEEE 100 (6), 1951-1970, 2012
16432012
Device scaling limits of Si MOSFETs and their application dependencies
DJ Frank, RH Dennard, E Nowak, PM Solomon, Y Taur, HSP Wong
Proceedings of the IEEE 89 (3), 259-288, 2001
15132001
Phase change memory
HSP Wong, S Raoux, SB Kim, J Liang, JP Reifenberg, B Rajendran, ...
Proceedings of the IEEE 98 (12), 2201-2227, 2010
12482010
CMOS scaling into the nanometer regime
Y Taur, DA Buchanan, W Chen, DJ Frank, KE Ismail, SH Lo, ...
Proceedings of the IEEE 85 (4), 486-504, 1997
10801997
Carbon nanotube computer
MM Shulaker, G Hills, N Patil, H Wei, HY Chen, HSP Wong, S Mitra
Nature 501 (7468), 526-530, 2013
7642013
Beyond the conventional transistor
HSP Wong
IBM Journal of Research and Development 46 (2.3), 133-168, 2002
7342002
Nanoelectronic programmable synapses based on phase change materials for brain-inspired computing
D Kuzum, RGD Jeyasingh, B Lee, HSP Wong
Nano letters 12 (5), 2179-2186, 2012
7062012
A compact SPICE model for carbon-nanotube field-effect transistors including nonidealities and its application—Part I: Model of the intrinsic channel region
J Deng, HSP Wong
IEEE Transactions on Electron Devices 54 (12), 3186-3194, 2007
7042007
Nanoscale cmos
HSP Wong, DJ Frank, PM Solomon, CHJ Wann, JJ Welser
Proceedings of the IEEE 87 (4), 537-570, 1999
6041999
A compact SPICE model for carbon-nanotube field-effect transistors including nonidealities and its application—Part II: Full device model and circuit performance benchmarking
J Deng, HSP Wong
IEEE Transactions on Electron Devices 54 (12), 3195-3205, 2007
6002007
Synaptic electronics: materials, devices and applications
D Kuzum, S Yu, HSP Wong
Nanotechnology 24 (38), 382001, 2013
5812013
MoS2 transistors with 1-nanometer gate lengths
SB Desai, SR Madhvapathy, AB Sachid, JP Llinas, Q Wang, GH Ahn, ...
Science 354 (6308), 99-102, 2016
5372016
An electronic synapse device based on metal oxide resistive switching memory for neuromorphic computation
S Yu, Y Wu, R Jeyasingh, D Kuzum, HSP Wong
IEEE Transactions on Electron Devices 58 (8), 2729-2737, 2011
4742011
Device design considerations for double-gate, ground-plane, and single-gated ultra-thin SOI MOSFET's at the 25 nm channel length generation
HSP Wong, DJ Frank, PM Solomon
International Electron Devices Meeting 1998. Technical Digest (Cat. No …, 1998
3931998
Technology and device scaling considerations for CMOS imagers
HS Wong
IEEE Transactions on electron Devices 43 (12), 2131-2142, 1996
3821996
Carbon nanotube and graphene device physics
HSP Wong, D Akinwande
Cambridge University Press, 2011
3732011
The end of CMOS scaling: toward the introduction of new materials and structural changes to improve MOSFET performance
T Skotnicki, JA Hutchby, TJ King, HSP Wong, F Boeuf
IEEE Circuits and Devices Magazine 21 (1), 16-26, 2005
3732005
Characteristics and device design of sub-100 nm strained Si N-and PMOSFETs
K Rim, J Chu, H Chen, KA Jenkins, T Kanarsky, K Lee, A Mocuta, H Zhu, ...
2002 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No …, 2002
3552002
Generalized scale length for two-dimensional effects in MOSFETs
DJ Frank, Y Taur, HSP Wong
IEEE Electron Device Letters 19 (10), 385-387, 1998
3431998
Modeling of transconductance degradation and extraction of threshold voltage in thin oxide MOSFET's
HS Wong, MH White, TJ Krutsick, RV Booth
Solid-State Electronics 30 (9), 953-968, 1987
3361987
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