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Ambika Prasad Shah
Ambika Prasad Shah
Assistant Professor, Electrical Engineering Department, Indian Institute of Technology Jammu
Verified email at iitjammu.ac.in - Homepage
Title
Cited by
Cited by
Year
Stable, reliable, and bit-interleaving 12T SRAM for space applications: A device circuit co-design
N Yadav, AP Shah, SK Vishvakarma
IEEE Transactions on Semiconductor Manufacturing 30 (3), 276-284, 2017
552017
An improved read-assist energy efficient single ended PPN based 10T SRAM cell for wireless sensor network
P Sanvale, N Gupta, V Neema, AP Shah, SK Vishvakarma
Microelectronics Journal 92, 104611, 2019
492019
On-chip adaptive body bias for reducing the impact of NBTI on 6T SRAM cells
AP Shah, N Yadav, A Beohar, SK Vishvakarma
IEEE Transactions on Semiconductor Manufacturing 31 (2), 242-249, 2018
462018
A reliable, multi-bit error tolerant 11T SRAM memory design for wireless sensor nodes
V Sharma, N Gupta, AP Shah, SK Vishvakarma, SS Chouhan
Analog Integrated Circuits and Signal Processing 107 (2), 339-352, 2021
252021
Soft error hardened asymmetric 10T SRAM cell for aerospace applications
AP Shah, SK Vishvakarma, M Hübner
Journal of Electronic Testing 36, 255-269, 2020
252020
Process variation and NBTI resilient Schmitt trigger for stable and reliable circuits
AP Shah, N Yadav, A Beohar, SK Vishvakarma
IEEE Transactions on Device and Materials Reliability 18 (4), 546-554, 2018
232018
An ultra-low power, reconfigurable, aging resilient RO PUF for IoT applications
S Khan, AP Shah, N Gupta, SS Chouhan, JG Pandey, SK Vishvakarma
Microelectronics journal 92, 104605, 2019
222019
Dual threshold voltage and sleep switch dual threshold voltage DOIND approach for leakage reduction in domino logic circuits
AP Shah, V Neema, S Daulatabad, P Singh
Microsystem Technologies 25, 1639-1652, 2019
212019
An efficient NBTI sensor and compensation circuit for stable and reliable SRAM cells
AP Shah, N Yadav, A Beohar, SK Vishvakarma
Microelectronics Reliability 87, 15-23, 2018
192018
Utilizing manufacturing variations to design a tri-state flip-flop PUF for IoT security applications
S Khan, AP Shah, SS Chouhan, S Rani, N Gupta, JG Pandey, ...
Analog Integrated Circuits and Signal Processing 103 (3), 477-492, 2020
182020
Analog/RF characteristics of a 3D-Cyl underlap GAA-TFET based on a Ge source using fringing-field engineering for low-power applications
A Beohar, N Yadav, AP Shah, SK Vishvakarma
Journal of Computational Electronics 17 (4), 1650-1657, 2018
182018
A symmetric D flip-flop based PUF with improved uniqueness
S Khan, AP Shah, SS Chouhan, N Gupta, JG Pandey, SK Vishvakarma
Microelectronics Reliability 106, 113595, 2020
152020
QCA based cost efficient coplanar 1× 4 RAM design with set/reset ability
SF Naz, S Ahmed, SB Ko, AP Shah, S Sharma
International Journal of Numerical Modelling: Electronic Networks, Devices …, 2022
132022
Effect of process, voltage and temperature (PVT) variations In LECTOR-B (leakage reduction technique) at 70 nm technology node
AP Shah, V Neema, S Daulatabad
2015 International Conference on Computer, Communication and Control (IC4), 1-6, 2015
132015
8-bit 250-MS/s ADC Based on SAR Architecture with Novel Comparator at 70 nm Technology Node
S Daulatabad, V Neema, AP Shah, P Singh
Procedia Computer Science 79, 589-596, 2016
122016
An energy‐efficient data‐dependent low‐power 10T SRAM cell design for LiFi enabled smart street lighting system application
N Gupta, V Sharma, AP Shah, S Khan, M Huebner, SK Vishvakarma
International Journal of Numerical Modelling: Electronic Networks, Devices …, 2020
112020
Soft error hardening enhancement analysis of NBTI tolerant Schmitt trigger circuit
AP Shah, D Rossi, V Sharma, SK Vishvakarma, M Waltl
Microelectronics Reliability 107, 113617, 2020
112020
Efficient CZTSSe thin film solar cell employing MoTe2/MoS2 as hole transport layer
A Kannaujiya, AK Patel, S Kannaujiya, AP Shah
Micro and Nanostructures 169, 207356, 2022
92022
On-chip adaptive vdd scaled architecture of reliable SRAM cell with improved soft error tolerance
N Gupta, AP Shah, RS Kumar, T Gupta, S Khan, SK Vishvakarma
IEEE Transactions on Device and Materials Reliability 20 (4), 694-705, 2020
92020
DOIND: a technique for leakage reduction in nanoscale domino logic circuits
AP Shah, V Neema, S Daulatabad
Journal of Semiconductors 37 (5), 055001, 2016
92016
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