| System level analysis of fast, per-core DVFS using on-chip switching regulators W Kim, MS Gupta, GY Wei, D Brooks 2008 IEEE 14th International Symposium on High Performance Computer …, 2008 | 893 | 2008 |
| Minerva: Enabling low-power, highly-accurate deep neural network accelerators B Reagen, P Whatmough, R Adolf, S Rama, H Lee, SK Lee, ... 2016 ACM/IEEE 43rd Annual International Symposium on Computer Architecture …, 2016 | 429 | 2016 |
| Thread motion: fine-grained power management for multi-core systems KK Rangan, GY Wei, D Brooks ACM SIGARCH Computer Architecture News 37 (3), 302-313, 2009 | 339 | 2009 |
| Profiling a warehouse-scale computer S Kanev, JP Darago, K Hazelwood, P Ranganathan, T Moseley, GY Wei, ... Proceedings of the 42nd Annual International Symposium on Computer …, 2015 | 288 | 2015 |
| A fully-integrated 3-level DC-DC converter for nanosecond-scale DVFS W Kim, D Brooks, GY Wei IEEE Journal of Solid-State Circuits 47 (1), 206-219, 2011 | 238 | 2011 |
| A fully digital, energy-efficient, adaptive power-supply regulator GY Wei, M Horowitz IEEE Journal of solid-state Circuits 34 (4), 520-528, 1999 | 238 | 1999 |
| Understanding voltage variations in chip multiprocessors using a distributed power-delivery network MS Gupta, JL Oatley, R Joseph, GY Wei, DM Brooks 2007 Design, Automation & Test in Europe Conference & Exhibition, 1-6, 2007 | 236 | 2007 |
| A portable, low-power, wireless two-lead EKG system TRF Fulford-Jones, GY Wei, M Welsh The 26th Annual International Conference of the IEEE Engineering in Medicine …, 2004 | 233 | 2004 |
| Aladdin: A pre-rtl, power-performance accelerator simulator enabling large design space exploration of customized architectures YS Shao, B Reagen, GY Wei, D Brooks 2014 ACM/IEEE 41st International Symposium on Computer Architecture (ISCA …, 2014 | 231 | 2014 |
| An ultra low power system architecture for sensor network applications M Hempstead, N Tripathi, P Mauro, GY Wei, D Brooks 32nd International Symposium on Computer Architecture (ISCA'05), 208-219, 2005 | 220 | 2005 |
| Adaptive bandwidth DLLs and PLLs using regulated supply CMOS buffers S Sidiropoulos, D Liu, J Kim, G Wei, M Horowitz 2000 Symposium on VLSI Circuits. Digest of Technical Papers (Cat. No …, 2000 | 203 | 2000 |
| Driving high voltage piezoelectric actuators in microrobotic applications M Karpelson, GY Wei, RJ Wood Sensors and actuators A: Physical 176, 78-89, 2012 | 197 | 2012 |
| A low power switching power supply for self-clocked systems GY Wei, M Horowitz Proceedings of 1996 International Symposium on Low Power Electronics and …, 1996 | 184 | 1996 |
| A review of actuation and power electronics options for flapping-wing robotic insects M Karpelson, GY Wei, RJ Wood 2008 IEEE international conference on robotics and automation, 779-786, 2008 | 178 | 2008 |
| A variable-frequency parallel I/O interface with adaptive power-supply regulation GY Wei, J Kim, D Liu, S Sidiropoulos, MA Horowitz IEEE Journal of Solid-State Circuits 35 (11), 1600-1610, 2000 | 169 | 2000 |
| Machsuite: Benchmarks for accelerator design and customized architectures B Reagen, R Adolf, YS Shao, GY Wei, D Brooks 2014 IEEE International Symposium on Workload Characterization (IISWC), 110-119, 2014 | 161 | 2014 |
| An adaptive PAM-4 5-Gb/s backplane transceiver in 0.25-μm CMOS JT Stonick, GY Wei, JL Sonntag, DK Weinlader IEEE Journal of Solid-State Circuits 38 (3), 436-443, 2003 | 157 | 2003 |
| 14.3 A 28nm SoC with a 1.2 GHz 568nJ/prediction sparse deep-neural-network engine with> 0.1 timing error rate tolerance for IoT applications PN Whatmough, SK Lee, H Lee, S Rama, D Brooks, GY Wei 2017 IEEE International Solid-State Circuits Conference (ISSCC), 242-243, 2017 | 144 | 2017 |
| Survey of hardware systems for wireless sensor networks M Hempstead, MJ Lyons, D Brooks, GY Wei Journal of Low Power Electronics 4 (1), 11-20, 2008 | 139 | 2008 |
| Process variation tolerant 3T1D-based cache architectures X Liang, R Canal, GY Wei, D Brooks 40th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO …, 2007 | 129 | 2007 |
David BrooksHaley Family Professor of Computer Science, Harvard UniversityEmail verificata su eecs.harvard.edu
