| Simultaneous handling of symmetry, common centroid, and general placement constraints Q Ma, L Xiao, YC Tam, EFY Young IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2010 | 94 | 2010 |
| Ripple: An effective routability-driven placer by iterative cell movement X He, T Huang, L Xiao, H Tian, G Cui, EFY Young Proceedings of the International Conference on Computer-Aided Design, 74-79, 2010 | 90 | 2010 |
| Practical placement and routing techniques for analog circuit designs L Xiao, EFY Young, X He, KP Pun 2010 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 675-679, 2010 | 61 | 2010 |
| Analog placement with common centroid and 1-D symmetry constraints L Xiao, EFY Young 2009 Asia and South Pacific Design Automation Conference, 353-360, 2009 | 51 | 2009 |
| Local clock skew minimization using blockage-aware mixed tree-mesh clock network L Xiao, Z Xiao, Z Qian, Y Jiang, T Huang, H Tian, EFY Young 2010 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 458-462, 2010 | 47 | 2010 |
| Fixed-outline thermal-aware 3D floorplanning L Xiao, S Sinha, J Xu, EFY Young 2010 15th Asia and South Pacific Design Automation Conference (ASP-DAC), 561-567, 2010 | 41 | 2010 |
| Ripple: A robust and effective routability-driven placer X He, T Huang, L Xiao, H Tian, EFY Young IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2013 | 29 | 2013 |
Zigang XiaoUniversity of Illinois at Urbana-ChampaignVerified email at illinois.edu
