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Antonio Canelas
Antonio Canelas
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AIDA: Layout-aware analog circuit-level sizing with in-loop layout generation
N Lourenço, R Martins, A Canelas, R Povoa, N Horta
Integration 55, 316-329, 2016
482016
AIDA: Robust layout-aware synthesis of analog ICs including sizing and layout generation
R Martins, N Lourenço, A Canelas, R Póvoa, N Horta
2015 International Conference on Synthesis, Modeling, Analysis and …, 2015
392015
Floorplan-aware analog IC sizing and optimization based on topological constraints
N Lourenço, A Canelas, R Póvoa, R Martins, N Horta
Integration 48, 183-197, 2015
382015
Two-step RF IC block synthesis with preoptimized inductors and full layout generation in-the-loop
R Martins, N Lourenço, F Passos, R Póvoa, A Canelas, E Roca, ...
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2018
372018
A SAX-GA approach to evolve investment strategies on financial markets based on pattern discovery techniques
A Canelas, R Neves, N Horta
Expert systems with applications 40 (5), 1579-1590, 2013
372013
Using polynomial regression and artificial neural networks for reusable analog IC sizing
N Lourenço, E Afacan, R Martins, F Passos, A Canelas, R Póvoa, N Horta, ...
2019 16th International Conference on Synthesis, Modeling, Analysis and …, 2019
312019
On the exploration of promising analog ic designs via artificial neural networks
N Lourenço, J Rosa, R Martins, H Aidos, A Canelas, R Póvoa, N Horta
2018 15th International Conference on Synthesis, Modeling, Analysis and …, 2018
302018
Electromigration-aware analog Router with multilayer multiport terminal structures
R Martins, N Lourenco, A Canelas, N Horta
Integration 47 (4), 532-547, 2014
282014
FUZYE: A Fuzzy -Means Analog IC Yield Optimization Using Evolutionary-Based Algorithms
A Canelas, R Póvoa, R Martins, N Lourenço, J Guilherme, JP Carvalho, ...
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2018
272018
Single-stage amplifier biased by voltage combiners with gain and energy-efficiency enhancement
R Povoa, N Lourenco, R Martins, A Canelas, NCG Horta, J Goes
IEEE Transactions on Circuits and Systems II: Express Briefs 65 (3), 266-270, 2017
262017
Artificial neural networks as an alternative for automatic analog IC placement
D Guerra, A Canelas, R Póvoa, N Horta, N Lourenço, R Martins
2019 16th International Conference on Synthesis, Modeling, Analysis and …, 2019
242019
LC-VCO automatic synthesis using multi-objective evolutionary techniques
R Póvoa, R Lourenço, N Lourenço, A Canelas, R Martins, N Horta
2014 IEEE International Symposium on Circuits and Systems (ISCAS), 293-296, 2014
242014
Electromigration-aware and IR-drop avoidance routing in analog multiport terminal structures
R Martins, N Lourenço, A Canelas, N Horta
2014 Design, Automation & Test in Europe Conference & Exhibition (DATE), 1-6, 2014
242014
Single-stage OTA biased by voltage-combiners with enhanced performance using current starving
R Povoa, N Lourenço, R Martins, A Canelas, N Horta, J Goes
IEEE Transactions on Circuits and Systems II: Express Briefs 65 (11), 1599-1603, 2017
232017
Enhanced systematic design of a voltage controlled oscillator using a two-step optimization methodology
F Passos, R Martins, N Lourenço, E Roca, R Povoa, A Canelas, ...
Integration 63, 351-361, 2018
192018
A new SAX-GA methodology applied to investment strategies optimization
A Canelas, R Neves, N Horta
Proceedings of the 14th annual conference on Genetic and evolutionary …, 2012
192012
A folded voltage-combiners biased amplifier for low voltage and high energy-efficiency applications
R Póvoa, N Lourenço, R Martins, A Canelas, N Horta, J Goes
IEEE Transactions on Circuits and Systems II: Express Briefs 67 (2), 230-234, 2019
162019
Efficient yield optimization method using a variable K-Means algorithm for analog IC sizing
A Canelas, R Martins, R Póvoa, N Lourenço, N Horta
Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017 …, 2017
142017
Yield optimization using k-means clustering algorithm to reduce Monte Carlo simulations
A Canelas, R Martins, R Póvoa, N Lourenço, N Horta
2016 13th International Conference on Synthesis, Modeling, Analysis and …, 2016
142016
Sub-μW Tow-Thomas based biquad filter with improved gain for biomedical applications
R Póvoa, R Arya, A Canelas, F Passos, R Martins, N Lourenço, N Horta
Microelectronics Journal 95, 104675, 2020
132020
Il sistema al momento non può eseguire l'operazione. Riprova più tardi.
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