Bekim Çilku
Bekim Çilku
Verified email at siemens.com
Title
Cited by
Cited by
Year
A TDMA-based arbitration scheme for mixed-criticality multicore platforms
B Cilku, A Crespo, P Puschner, J Coronel, S Peiro
2015 International Conference on Event-based Control, Communication, and …, 2015
222015
Link reliability analysis in ad hoc networks
T Dimitar, F Sonja, C Bekim, G Aksenti
Proceedings of XII telekomunikacioni forum TELFOR, 23-25, 2004
152004
A Time-Predictable Instruction-Cache Architecture that Uses Prefetching and Cache Locking
B Cilku, D Prokesch, P Puschner
2015 IEEE International Symposium on Object/Component/Service-Oriented Real …, 2015
142015
Grid computing implementation in Ad hoc networks
A Grnarov, B Cilku, I Miskovski, S Filiposka, D Trajanov
Advances in Computer and Information Sciences and Engineering, 196-201, 2008
132008
Towards a time-predictable hierarchical memory architecture-prefetching options to be explored
B Cilku, P Puschner
2010 13th IEEE International Symposium on Object/Component/Service-Oriented …, 2010
112010
A dual-layer bus arbiter for mixed-criticality systems with hypervisors
B Cilku, B Frömel, P Puschner
2014 12th IEEE International Conference on Industrial Informatics (INDIN …, 2014
82014
New algorithms for efficient scheduling in Grid Ad-Hoc networks
B Cilku, A Grnarov
Proceedings of the ITI 2009 31st International Conference on Information …, 2009
52009
A memory arbitration scheme for mixed-criticality multocore platforms
B Cilku, A Crespo, P Puschner, J Coronel, S Peiro
Proc. 2nd Workshop on Mixed Criticality Systems (WMC), RTSS, 27-32, 2014
42014
Constructing time-predictable MPSoCs: Avoid conflicts in temporal control
P Puschner, B Cilku, D Prokesch
2016 IEEE 10th International Symposium on Embedded Multicore/Many-core …, 2016
32016
Improving performance of single-path code through a time-predictable memory hierarchy
B Cilku, W Puffitsch, D Prokesch, M Schoeberl, P Puschner
2017 IEEE 20th International Symposium on Real-Time Distributed Computing …, 2017
22017
Designing a time predictable memory hierarchy for single-path code
B Cilku, P Puschner
ACM SIGBED Review 12 (2), 16-21, 2015
12015
Aligning Single Path Loops to Reduce the Number of Capacity Cache Misses
B Cilku, R Kammerer, P Puschner
6th International Workshop on Compositional Theory and Technology for Real …, 2013
12013
Using a Local Prefetch Strategy to Obtain Temporal Time Predictability
B Cilku, P Puschner
12011
Time-predictable memory hierarchy
B Chilku
Wien, 2018
2018
Best Practice for Caching of Single-Path Code
M Schoeberl, B Cilku, D Prokesch, P Puschner
17th International Workshop on Worst-Case Execution Time Analysis (WCET 2017), 2017
2017
Usability constraints of grid in ad hoc networks
B Cilku, A Grnarov, A Abazi
2009 International Conference on Innovations in Information Technology (IIT …, 2009
2009
Ad Hoc Networks Routing Protocols Efficiency With Respect To Connection Availability
T Dimitar, F Sonja, C Bekim, A Grnarov
XtratuM integration on bespoke HW with TDMA-based memory-bus arbitration (Integration of XtratuM on bespoke hardware)
B Cilku
Final implementation and assessment of the proposed architectural solutions
B Cilku
Link Reliability Modeling for Ad Hoc Networks
T Dimitar, F Sonja, C Bekim, G Aksenti
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Articles 1–20