Segui
Haozhe Zhu (朱浩哲)
Haozhe Zhu (朱浩哲)
Altri nomiHaozhe Zhu
Email verificata su fudan.edu.cn - Home page
Titolo
Citata da
Citata da
Anno
OCEAN: An on-chip incremental-learning enhanced processor with gated recurrent neural network accelerators
C Chen, H Ding, H Peng, H Zhu, R Ma, P Zhang, X Yan, Y Wang, M Wang, ...
ESSCIRC 2017-43rd IEEE European solid state circuits conference, 259-262, 2017
292017
COMB-MCM: Computing-on-memory-boundary NN processor with bipolar bitwise sparsity optimization for scalable multi-chiplet-module edge machine learning
H Zhu, B Jiao, J Zhang, X Jia, Y Wang, T Guan, S Wang, D Niu, H Zheng, ...
2022 IEEE International Solid-State Circuits Conference (ISSCC) 65, 1-3, 2022
192022
OCEAN: An on-chip incremental-learning enhanced artificial neural network processor with multiple gated-recurrent-unit accelerators
C Chen, H Ding, H Peng, H Zhu, Y Wang, CJR Shi
IEEE Journal on Emerging and Selected Topics in Circuits and Systems 8 (3 …, 2018
182018
16.2 A 28nm 53.8 TOPS/W 8b sparse transformer accelerator with in-memory butterfly zero skipper for unstructured-pruned NN and CIM-based local-attention-reusable engine
S Liu, P Li, J Zhang, Y Wang, H Zhu, W Jiang, S Tang, C Chen, Q Liu, ...
2023 IEEE International Solid-State Circuits Conference (ISSCC), 250-252, 2023
132023
A Communication-aware DNN accelerator on ImageNet using in-memory entry-counting based algorithm-circuit-architecture co-design in 65-nm CMOS
H Zhu, C Chen, S Liu, Q Zou, M Wang, L Zhang, X Zeng, CJR Shi
IEEE Journal on Emerging and Selected Topics in Circuits and Systems 10 (3 …, 2020
122020
A 0.57-gops/dsp object detection pim accelerator on fpga
B Jiao, J Zhang, Y Xie, S Wang, H Zhu, X Kang, Z Dong, L Zhang, C Chen
Proceedings of the 26th Asia and South Pacific Design Automation Conference …, 2021
82021
Tanji: A general-purpose neural network accelerator with unified crossbar architecture
H Zhu, Y Wang, CJR Shi
IEEE Design & Test 37 (1), 56-63, 2019
52019
A 11.6 μ W Computing-on-Memory-Boundary Keyword Spotting Processor with Joint MFCC-CNN Ternary Quantization
X Jia, H Zhu, Y Wang, J Zhang, F Lin, X Xiong, D Xu, C Chen, Q Liu
2022 IEEE International Symposium on Circuits and Systems (ISCAS), 2816-2820, 2022
32022
A 28 nm 81 Kb 59–95.3 TOPS/W 4T2R ReRAM computing-in-memory accelerator with voltage-to-time-to-digital based output
K Zhou, X Jia, C Zhao, X Zhang, G Wu, C Mu, H Zhu, Y Ding, C Chen, ...
IEEE Journal on Emerging and Selected Topics in Circuits and Systems 12 (4 …, 2022
22022
An efficient Markov random field based denoising approach for dynamic vision sensor
X Cheng, H Zhu, J Liu, M Wang, X Zeng
2021 IEEE 14th International Conference on ASIC (ASICON), 1-4, 2021
22021
Computing Utilization Enhancement for Chiplet-based Homogeneous Processing-in-Memory Deep Learning Processors
B Jiao, H Zhu, J Zhang, S Wang, X Kang, L Zhang, M Wang, C Chen
Proceedings of the 2021 on Great Lakes Symposium on VLSI, 241-246, 2021
22021
ALPINE: An Agile Processing-in-Memory Macro Compilation Framework
J Zhang, B Jiao, Y Wang, H Zhu, L Zhang, C Chen
Proceedings of the 2021 on Great Lakes Symposium on VLSI, 333-338, 2021
22021
XNORAM: An efficient computing-in-memory architecture for binary convolutional neural networks with flexible dataflow mapping
S Liu, H Zhu, C Chen, L Zhang, CJR Shi
2020 2nd IEEE International Conference on Artificial Intelligence Circuits …, 2020
22020
Trident-CIM: A LUT-Based Compute-in-Memory Macro With Trident Read Bit-Line and Partial Product Pruning
H Zhu, H Zhang, S He, M Li, X Zeng, C Chen
IEEE Transactions on Circuits and Systems II: Express Briefs, 2024
2024
Bit-Offsetter: A Bit-serial DNN Accelerator with Weight-offset MAC for Bit-wise Sparsity Exploitation
S He, H Zhang, M Li, H Zhu, C Chen, Q Liu, X Zeng
2023 IEEE 5th International Conference on Artificial Intelligence Circuits …, 2023
2023
A Scalable Die-to-Die Interconnect with Replay and Repair Schemes for 2.5 D/3D Integration
J Liao, B Jiao, J Zhang, S Liu, H Jiang, J Tao, W Jiang, Q Liu, L Zhang, ...
2023 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2023
2023
A Event-Driven Neural Spike Sorting Processor with Sparsity-Aware Computing-In-Memory Macros
H Jiang, J Zheng, Y Wang, J Zhang, H Zhu, L Lyu, Y Chen, C Chen, Q Liu
2023 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2023
2023
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