Miguel Arias-Estrada
Miguel Arias-Estrada
Computer Science
Email verificata su inaoep.mx
Titolo
Citata da
Citata da
Anno
Real-time FPGA-based architecture for bicubic interpolation: an application for digital image scaling
MA Nuno-Maganda, MO Arias-Estrada
2005 International Conference on Reconfigurable Computing and FPGAs …, 2005
842005
Fast three dimensional recovery method and apparatus
M Arias-Estrada, A Morales-Reyes, ML Rosas-Cholula, G Sosa-Ramirez
US Patent 7,769,205, 2010
662010
FPGA-based configurable systolic architecture for window-based image processing
C Torres-Huitzil, M Arias-Estrada
EURASIP Journal on Advances in Signal Processing 2005 (7), 264713, 2005
592005
Real-time image processing with a compact FPGA-based systolic architecture
C Torres-Huitzil, M Arias-Estrada
Real-time imaging 10 (3), 177-187, 2004
592004
An FPGA architecture for high speed edge and corner detection
C Torres-Huitzil, M Arias-Estrada
Proceedings Fifth IEEE International Workshop on Computer Architectures for …, 2000
562000
Integrated motion vision sensor
M Arias-Estrada
US Patent 6,253,161, 2001
452001
FPGA-based detection of SIFT interest keypoints
L Chang, J Hernández-Palancar, LE Sucar, M Arias-Estrada
Machine vision and applications 24 (2), 371-392, 2013
352013
An FPGA co-processor for real-time visual tracking
M Arias-Estrada, E Rodríguez-Palacios
International Conference on Field Programmable Logic and Applications, 710-719, 2002
332002
Real-time field programmable gate array architecture for computer vision
M Arias-Estrada, C Torres-Huitzil
Journal of Electronic Imaging 10 (1), 289-296, 2001
332001
Iterative closest SIFT formulation for robust feature matching
R Lemuz-López, M Arias-Estrada
International Symposium on Visual Computing, 502-513, 2006
262006
Compact spiking neural network implementation in FPGA
S Maya, R Reynoso, C Torres, M Arias-Estrada
International Workshop on Field Programmable Logic and Applications, 270-276, 2000
262000
Multiple stereo matching using an extended architecture
M Arias-Estrada, JM Xicotencatl
International Conference on Field Programmable Logic and Applications, 203-212, 2001
242001
An FPGA stereo matching unit based on fuzzy logic
M Pérez-Patricio, A Aguilar-González, M Arias-Estrada, ...
Microprocessors and Microsystems 42, 87-99, 2016
222016
FPGA processor for real-time optical flow computation
S Maya-Rueda, M Arias-Estrada
International Conference on Field Programmable Logic and Applications, 1103-1106, 2003
212003
Input and/or output pruning of composite length FFTs using a DIF-DIT transform decomposition
M Medina-Melendrez, M Arias-Estrada, A Castro
IEEE Transactions on Signal Processing 57 (10), 4124-4128, 2009
172009
FPGA-based customizable systolic architecture for image processing applications
G Saldana, M Arias-Estrada
2005 International Conference on Reconfigurable Computing and FPGAs …, 2005
172005
Motion vision sensor architecture with asynchronous self-signaling pixels
M Arias-Estrada, D Poussart, M Tremblay
Proceedings Fourth IEEE International Workshop on Computer Architecture for …, 1997
171997
An FPGA 2D-convolution unit based on the CAPH language
A Aguilar-González, M Arias-Estrada, M Pérez-Patricio, ...
Journal of Real-Time Image Processing 16 (2), 305-319, 2019
152019
FPGA based acceleration for image processing applications
G Saldaña-González, M Arias-Estrada
Image Processing, 477-492, 2009
152009
An FPGA implementation to detect selective cationic antibacterial peptides
CP González, MAN Maganda, M Arias-Estrada, G Del Rio
PloS one 6 (6), e21399, 2011
142011
Il sistema al momento non può eseguire l'operazione. Riprova più tardi.
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