Coverage-directed test generation using symbolic techniques D Geist, M Farkas, A Landver, Y Lichtenstein, S Ur, Y Wolfsthal International Conference on Formal Methods in Computer-Aided Design, 143-158, 1996 | 129 | 1996 |
X-Gen: A random test-case generator for systems and SoCs R Emek, I Jaeger, Y Naveh, G Bergman, G Aloni, Y Katz, M Farkash, ... Seventh IEEE International High-Level Design Validation and Test Workshop …, 2002 | 81 | 2002 |
Synchronization for system analysis M Farkash, D Geist, R Gewirtzman, K Holtz US Patent 6,757,847, 2004 | 70 | 2004 |
A methodology for the verification of a “system on chip” D Geist, G Biran, T Arons, M Slavkin, Y Nustov, M Farkas, K Holtz, A Long, ... Proceedings of the 36th annual ACM/IEEE Design Automation Conference, 574-579, 1999 | 52 | 1999 |
Method for finding multi-cycle clock gating CR Eisner, M Farkash US Patent 7,594,200, 2009 | 30 | 2009 |
Distributed dynamic BDD reordering Z Nevo, M Farkash Proceedings of the 43rd annual Design Automation Conference, 223-228, 2006 | 14 | 2006 |
Distributed BDD reordering M Farkash, Z Nevo US Patent 7,131,085, 2006 | 11 | 2006 |
Synchronization using bus arbitration control for system analysis M Farkas, D Geist, R Gewirtzman, K Holtz US Patent 6,629,174, 2003 | 11 | 2003 |
Coverage learned targeted validation for incremental HW changes M Farkash, B Hickerson, M Behm Proceedings of the 51st Annual Design Automation Conference, 1-6, 2014 | 9 | 2014 |
Data mining diagnostics and bug MRIs for HW bug localization M Farkash, B Hickerson, B Samynathan 2015 Design, Automation & Test in Europe Conference & Exhibition (DATE), 79-84, 2015 | 6 | 2015 |
Mining coverage data for test set coverage efficiency M Farkash, B Hickerson, B Samynathan Design and Verification Conference, DVCON 2015, 2015 | 6 | 2015 |
Autonomous hardware for application power usage optimization J Bhadra, W Chen, M Farkash, KK Hsieh US Patent 10,481,674, 2019 | 2 | 2019 |
Using data mining to increase controllability and observability in functional verification MC Farkash | 2 | 2014 |
Reuse-aware property specification M Farkash, A Fedeli, L Gluhovsky, A McIsaac, A Maggiore, V Preis PROSYD deliverable 1 (2), 2004 | 2 | 2004 |
Method for multi-cycle clock gating CR Eisner, MC Farkash US Patent 8,245,178, 2012 | 1 | 2012 |
Verification technique M Farkash, S Ur US Patent 7,996,799, 2011 | 1 | 2011 |
Improved Decision Heuristics for High Performance SAT Based Static Property Checking E Zarpas, M Roveri, A Cimatti, K Winkelmann, R Brinkmann, Y Novikov, ... PROSYD deliverable 3 (1), 2004 | 1 | 2004 |
Run-time security protection system and method MC Farkash, J Bhadra, S Ray, W Chen US Patent 11,017,077, 2021 | | 2021 |
Impact checking technique M Farkash, S Ur US Patent 7,322,016, 2008 | | 2008 |
List of Authors L. Arditi A. Aziz C. Barrett D. Basin M Bickford, C Blumenröhr, SP Khatri, D Borrione, B Bose, H Bouamama, ... Formal Methods in Computer-aided Design:... International Conference, FMCAD …, 1996 | | 1996 |