Segui
Tommaso Zanotti
Tommaso Zanotti
Post-Doc Researcher, Università degli studi di Modena e Reggio Emilia
Email verificata su unimore.it
Titolo
Citata da
Citata da
Anno
Advanced Data Encryption​ using 2D Materials
C Wen, X Li, T Zanotti, FM Puglisi, Y Shi, F Saiz, A Antidormi, S Roche, ...
Advanced Materials 33 (27), 2100185, 2021
782021
Smart logic-in-memory architecture for low-power non-von neumann computing
T Zanotti, FM Puglisi, P Pavan
IEEE Journal of the Electron Devices Society 8, 757-764, 2020
542020
Random Telegraph Noise in Metal‐Oxide Memristors for True Random Number Generators: A Materials Study
X Li, T Zanotti, T Wang, K Zhu, FM Puglisi, M Lanza
Advanced Functional Materials 31 (27), 2102172, 2021
302021
Advanced data encryption using two-dimensional materials
M Lanza, C Wen, X Li, T Zanotti, FM Puglisi, Y Shi, F Saiz, A Antidormi, ...
Adv. Mater 33 (2100185.10), 1002, 2021
252021
Reconfigurable smart in-memory computing platform supporting logic and binarized neural networks for low-power edge devices
T Zanotti, FM Puglisi, P Pavan
IEEE Journal on Emerging and Selected Topics in Circuits and Systems 10 (4 …, 2020
242020
Unimore resistive random access memory (RRAM) Verilog-A model
FM Puglisi, T Zanotti, P Pavan
NanoHUB, 2019
202019
Reliability-aware design strategies for stateful logic-in-memory architectures
T Zanotti, FM Puglisi, P Pavan
IEEE Transactions on Device and Materials Reliability 20 (2), 278-285, 2020
192020
SIMPLY: Design of a RRAM-based smart logic-in-memory architecture using RRAM compact model
FM Puglisi, T Zanotti, P Pavan
ESSDERC 2019-49th European Solid-State Device Research Conference (ESSDERC …, 2019
172019
Circuit reliability of low-power RRAM-based logic-in-memory architectures
T Zanotti, FM Puglisi, P Pavan
2019 IEEE International Integrated Reliability Workshop (IIRW), 1-5, 2019
132019
STT-MTJ based smart implication for energy-efficient logic-in-memory computing
R De Rose, T Zanotti, FM Puglisi, F Crupi, P Pavan, M Lanuzza
Solid-State Electronics 184, 108065, 2021
112021
Reliability and performance analysis of logic-in-memory based binarized neural networks
T Zanotti, FM Puglisi, P Pavan
IEEE Transactions on Device and Materials Reliability 21 (2), 183-191, 2021
112021
Reliability of logic-in-memory circuits in resistive memory arrays
T Zanotti, C Zambelli, FM Puglisi, V Milo, E Pérez, MK Mahadevaiah, ...
IEEE Transactions on Electron Devices 67 (11), 4611-4615, 2020
112020
Circuit reliability analysis of RRAM-based logic-in-memory crossbar architectures including line parasitic effects, variability, and random telegraph noise
T Zanotti, FM Puglisi, P Pavan
2020 IEEE International Reliability Physics Symposium (IRPS), 1-5, 2020
112020
Comprehensive physics-based RRAM compact model including the effect of variability and multi-level random telegraph noise
T Zanotti, P Pavan, FM Puglisi
Microelectronic Engineering 266, 111886, 2022
82022
Multi-input logic-in-memory for ultra-low power non-von Neumann computing
T Zanotti, P Pavan, FM Puglisi
Micromachines 12 (10), 1243, 2021
82021
Smart logic-in-memory architecture for ultra-low power large fan-in operations
T Zanotti, FM Puglisi, P Pavan
2020 2nd IEEE International Conference on Artificial Intelligence Circuits …, 2020
82020
Hardware implementation of a true random number generator integrating a hexagonal boron nitride memristor with a commercial microcontroller
S Pazos, W Zheng, T Zanotti, F Aguirre, T Becker, Y Shen, K Zhu, Y Yuan, ...
Nanoscale 15 (5), 2171-2180, 2023
72023
Energy-efficient non-von neumann computing architecture supporting multiple computing paradigms for logic and binarized neural networks
T Zanotti, FM Puglisi, P Pavan
Journal of Low Power Electronics and Applications 11 (3), 29, 2021
72021
Low-Bit precision neural network architecture with high immunity to variability and random telegraph noise based on resistive memories
T Zanotti, FM Puglisi, P Pavan
2021 IEEE International Reliability Physics Symposium (IRPS), 1-6, 2021
72021
Circuit reliability analysis of in-memory inference in binarized neural networks
T Zanotti, FM Puglisi, P Pavan
2020 IEEE International Integrated Reliability Workshop (IIRW), 1-5, 2020
52020
Il sistema al momento non può eseguire l'operazione. Riprova più tardi.
Articoli 1–20