Stefano Di Carlo
Stefano Di Carlo
Associate Professor, Politecnico di Torino
Verified email at polito.it - Homepage
TitleCited byYear
An expanded evaluation of protein function prediction methods shows an improvement in accuracy
Y Jiang, TR Oron, WT Clark, AR Bankapur, D D’Andrea, R Lepore, ...
Genome biology 17 (1), 184, 2016
2112016
A watchdog processor to detect data and control flow errors
A Benso, S Di Carlo, G Di Natale, P Prinetto
9th IEEE On-Line Testing Symposium, 2003. IOLTS 2003., 144-148, 2003
702003
Drift correction methods for gas chemical sensors in artificial olfaction systems: techniques and challenges
S Di Carlo, M Falasconi
INTECH Open Access Publisher, 2012
642012
Control-flow checking via regular expressions
A Benso, S Di Carlo, G Di Natale, P Prinetto, L Tagliaferri
Proceedings 10th Asian Test Symposium, 299-303, 2001
552001
HD/sup 2/BIST: a hierarchical framework for BIST scheduling, data patterns delivering and diagnosis in SoCs
A Benso, S Chiusano, S Di Carlo, P Prinetto, F Ricciato, M Spadari, ...
Proceedings International Test Conference 2000 (IEEE Cat. No. 00CH37159 …, 2000
512000
Increasing pattern recognition accuracy for chemical sensing by evolutionary based drift compensation
S Di Carlo, M Falasconi, E Sánchez, A Scionti, G Squillero, A Tonda
Pattern Recognition Letters 32 (13), 1594-1603, 2011
492011
Software-based self-test of set-associative cache memories
S Di Carlo, P Prinetto, A Savino
IEEE Transactions on Computers 60 (7), 1030-1044, 2010
492010
A programmable BIST architecture for clusters of multiple-port SRAMs
A Benso, S Di Carlo, G Di Natale, P Prinetto, ML Bodoni
Proceedings International Test Conference 2000 (IEEE Cat. No. 00CH37159 …, 2000
462000
March AB, March AB1: new March tests for unlinked dynamic memory faults
A Benso, A Bosio, S Di Carlo, G Di Natale, P Prinetto
IEEE International Conference on Test, 2005., 8 pp.-841, 2005
452005
IEEE standard 1500 compliance verification for embedded cores
A Benso, S Di Carlo, P Prinetto, Y Zorian
IEEE transactions on very large scale integration (VLSI) systems 16 (4), 397-407, 2008
382008
Statistical reliability estimation of microprocessor-based systems
A Savino, S Di Carlo, G Politano, A Benso, A Bosio, G Di Natale
IEEE Transactions on Computers 61 (11), 1521-1534, 2011
372011
An effective distributed BIST architecture for RAMs
ML Bodoni, A Benso, S Chiusano, S Di Carlo, G Di Natale, P Prinetto
Proceedings IEEE European Test Workshop, 119-124, 2000
372000
Specification and design of a new memory fault simulator
A Benso, S Di Carlo, G Di Natale, P Prinetto
Proceedings of the 11th Asian Test Symposium, 2002.(ATS'02)., 92-97, 2002
322002
Static analysis of SEU effects on software applications
A Benso, S Di Carlo, G Di Natale, P Prinetto
Proceedings. International Test Conference, 500-508, 2002
312002
Exploiting code mobility for dynamic binary obfuscation
P Falcarin, S Di Carlo, A Cabutto, N Garazzino, D Barberis
2011 World Congress on Internet Security (WorldCIS-2011), 114-120, 2011
302011
A functional verification based fault injection environment
A Benso, A Bosio, S Di Carlo, R Mariani
22nd IEEE International Symposium on Defect and Fault-Tolerance in VLSI …, 2007
292007
Data criticality estimation in software applications
A Benso, S Di Carlo, G Di Natale, P Prinetto, L Tagliaferri
International test conference, 802-810, 2003
292003
Automatic March tests generation for static and dynamic faults in SRAMs
A Benso, A Bosio, S Di Carlo, G Di Natale, P Prinetto
European Test Symposium (ETS'05), 122-127, 2005
282005
Programmable built-in self-testing of embedded RAM clusters in system-on-chip architectures
A Benso, S Di Carlo, G Di Natale, P Prinetto, ML Bodoni
IEEE Communications Magazine 41 (9), 90-97, 2003
272003
A combined approach for genome wide protein function annotation/prediction
A Benso, S Di Carlo, H ur Rehman, G Politano, A Savino, P Suravajhala
Proteome science 11 (1), S1, 2013
262013
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Articles 1–20