Davide Bellizia
Davide Bellizia
PostDoc Researcher @ UCL Crypto Group
Email verificata su uclouvain.be - Home page
Titolo
Citata da
Citata da
Anno
Univariate power analysis attacks exploiting static dissipation of nanometer CMOS VLSI circuits for cryptographic applications
D Bellizia, S Bongiovanni, P Monsurro, G Scotti, A Trifiletti
IEEE Transactions on Emerging Topics in Computing 5 (3), 329-339, 2016
232016
Design of Low-Voltage High-Speed CML D-Latches in Nanometer CMOS Technologies
G Scotti, D Bellizia, A Trifiletti, G Palumbo
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 25 (12 …, 2017
152017
Implementation of the PRESENT-80 block cipher and analysis of its vulnerability to side channel attacks exploiting static power
D Bellizia, G Scotti, A Trifiletti
2016 MIXDES-23rd International Conference Mixed Design of Integrated …, 2016
152016
Spook: sponge-based leakage-resistant authenticated encryption with a masked tweakable block cipher
D Bellizia, F Berti, O Bronchain, G Cassiers, S Duval, C Guo, G Leander, ...
IACR Transactions on Symmetric Cryptology, 295-349, 2020
132020
Secure double rate registers as an RTL countermeasure against power analysis attacks
D Bellizia, S Bongiovanni, P Monsurro, G Scotti, A Trifiletti, FB Trotta
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 26 (7 …, 2018
122018
Template attacks exploiting static power and application to CMOS lightweight crypto‐hardware
D Bellizia, M Djukanovic, G Scotti, A Trifiletti
International Journal of Circuit Theory and Applications 45 (2), 229-241, 2017
122017
Reducing a masked implementation’s effective security order with setup manipulations
I Levi, D Bellizia, FX Standaert
IACR Transactions on Cryptographic Hardware and Embedded Systems, 293-317, 2019
112019
Mode-Level vs. Implementation-Level Physical Security in Symmetric Cryptography
D Bellizia, O Bronchain, G Cassiers, V Grosso, C Guo, C Momin, ...
Annual International Cryptology Conference, 369-400, 2020
92020
Novel measurements setup for attacks exploiting static power using DC pico-ammeter
D Bellizia, D Cellucci, V Di Stefano, G Scotti, A Trifiletti
2017 European Conference on Circuit Theory and Design (ECCTD), 1-4, 2017
82017
Multivariate analysis exploiting static power on nanoscale CMOS circuits for cryptographic applications
M Djukanovic, D Bellizia, G Scotti, A Trifiletti
International Conference on Cryptology in Africa, 79-94, 2017
82017
TEL logic style as a countermeasure against side-channel attacks: Secure cells library in 65nm CMOS and experimental results
D Bellizia, G Scotti, A Trifiletti
IEEE Transactions on Circuits and Systems I: Regular Papers 65 (11), 3874-3884, 2018
62018
A Novel Very Low Voltage Topology to implement MCML XOR Gates
D Bellizia, G Palumbo, G Scotti, A Trifiletti
2018 14th Conference on Ph. D. Research in Microelectronics and Electronics …, 2018
32018
Secure implementation of TEL-compatible flip-flops using a standard-cell approach
D Bellizia, G Scotti, A Trifiletti
2018 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2018
32018
On-chip analog current equalizer as a countermeasure against side-channel attacks in CMOS nanometer technology
D Bellizia, G Scotti, A Trifiletti
2016 MIXDES-23rd International Conference Mixed Design of Integrated …, 2016
22016
On-chip Current-Mode Approach to Thwart CPA Attacks in CMOS Nanometer Technology
D Bellizia, G Scotti, A Trifiletti
International Journal of Microelectronics and Computer Science 7 (4), 147-156, 2016
22016
Beyond algorithmic noise or how to shuffle parallel implementations?
I Levi, D Bellizia, FX Standaert
International Journal of Circuit Theory and Applications 48 (5), 674-695, 2020
12020
SC-DDPL: A Novel Standard-Cell Based Approach for Counteracting Power Analysis Attacks in the Presence of Unbalanced Routing
D Bellizia, S Bongiovanni, M Olivieri, G Scotti
IEEE Transactions on Circuits and Systems I: Regular Papers, 1-14, 2020
12020
Demonstrating an LPPN Processor
D Kamel, D Bellizia, FX Standaert, D Flandre, D Bol
Proceedings of the 2018 Workshop on Attacks and Solutions in Hardware …, 2018
12018
VHDL implementation of FWL RLS algorithm
D Bellizia, P Monsurrò, A Trifiletti
2017 European Conference on Circuit Theory and Design (ECCTD), 1-4, 2017
12017
Spook: Updates on the Round-2 Submission
D Bellizia, F Berti, O Bronchain, G Cassiers, S Duval, C Guo, G Leander, ...
2020
Il sistema al momento non può eseguire l'operazione. Riprova più tardi.
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