| Overview of the SpiNNaker system architecture SB Furber, DR Lester, LA Plana, JD Garside, E Painkras, S Temple, ... IEEE transactions on computers 62 (12), 2454-2467, 2012 | 755 | 2012 |
| SpiNNaker: A 1-W 18-core system-on-chip for massively-parallel neural network simulation E Painkras, LA Plana, J Garside, S Temple, F Galluppi, C Patterson, ... IEEE Journal of Solid-State Circuits 48 (8), 1943-1953, 2013 | 473 | 2013 |
| SpiNNaker: mapping neural networks onto a massively-parallel chip multiprocessor MM Khan, DR Lester, LA Plana, A Rast, X Jin, E Painkras, SB Furber 2008 IEEE International Joint Conference on Neural Networks (IEEE World …, 2008 | 392 | 2008 |
| Spinnaker: A multi-core system-on-chip for massively-parallel neural net simulation E Painkras, LA Plana, J Garside, S Temple, S Davidson, J Pepper, ... Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, 1-4, 2012 | 82 | 2012 |
| SpiNNaker: design and implementation of a GALS multicore system-on-chip LA Plana, D Clark, S Davidson, S Furber, J Garside, E Painkras, J Pepper, ... ACM Journal on Emerging Technologies in Computing Systems (JETC) 7 (4), 1-18, 2011 | 55 | 2011 |
| Scalable communications for a million-core neural processing architecture C Patterson, J Garside, E Painkras, S Temple, LA Plana, J Navaridas, ... Journal of Parallel and Distributed Computing 72 (11), 1507-1520, 2012 | 23 | 2012 |
| SpiNNaker: Fault tolerance in a power-and area-constrained large-scale neuromimetic architecture J Navaridas, S Furber, J Garside, X Jin, M Khan, D Lester, M Luján, ... Parallel Computing 39 (11), 693-708, 2013 | 20 | 2013 |
| A framework for the design and implementation of a dynamic face tracking system E Painkras, C Charoensak TENCON 2005-2005 IEEE Region 10 Conference, 1-6, 2005 | 12 | 2005 |
| A VLSI architecture for Gabor filtering in face processing applications E Painkras, C Charoensak 2005 International Symposium on Intelligent Signal Processing and …, 2005 | 10 | 2005 |
| System level modelling for spinnaker cmp system M Khan, E Painkras, X Jin, L Plana, J Woods, S Furber Proc. 1st International Workshop on Rapid Simulation and Performance …, 2009 | 9 | 2009 |
| A chip multiprocessor for a large-scale neural simulator E Painkras PQDT-UK & Ireland, 2013 | 3 | 2013 |
| FaceProcessor: a framework for hardware design and implementation of a dynamic face tracking system E Painkras, C Charoensak 2005 5th International Conference on Information Communications & Signal …, 2005 | 2 | 2005 |
| Fundamental algorithms for projective voxelization RC Jegathese, E Painkras, EC Prakash Václav Skala-UNION Agency, 1998 | 2 | 1998 |
| The impact of technology scaling in the SpiNNaker chip multiprocessor E Painkras, S Furber Workshop on Unique Chips and Systems UCAS-7, 20, 2012 | 1 | 2012 |
| Voxelization chip design using FPGAs E Painkras, CC Lei, CNY Ocean Proceedings of IEEE. IEEE Region 10 Conference. TENCON 99.'Multimedia …, 1999 | | 1999 |
| Voxelization using FPGAs GHJ Lim, CL Chan, NYO Chok, EC Prakash, E Painkras | | 1999 |
| System-level Model for SpiNNaker CMP System MM Khan, E Painkras, X Jin, LA Plana, JV Woods, SB Furber | | |
| Architecture to Analyze the Dynamics of Forex Rates G Sebastian, E Painkras, EС Prakash | | |
Steve FurberProfessor of Computer Engineering, Department of Computer Science, The University of Manchester, UKVerified email at manchester.ac.uk
