| Minerva: Enabling low-power, highly-accurate deep neural network accelerators B Reagen, P Whatmough, R Adolf, S Rama, H Lee, SK Lee, ... 2016 ACM/IEEE 43rd Annual International Symposium on Computer Architecture …, 2016 | 428 | 2016 |
| 14.3 A 28nm SoC with a 1.2 GHz 568nJ/prediction sparse deep-neural-network engine with> 0.1 timing error rate tolerance for IoT applications PN Whatmough, SK Lee, H Lee, S Rama, D Brooks, GY Wei 2017 IEEE International Solid-State Circuits Conference (ISSCC), 242-243, 2017 | 144 | 2017 |
| Ares: A framework for quantifying the resilience of deep neural networks B Reagen, U Gupta, L Pentecost, P Whatmough, SK Lee, N Mulholland, ... 2018 55th ACM/ESDA/IEEE Design Automation Conference (DAC), 1-6, 2018 | 108 | 2018 |
| DNN engine: A 28-nm timing-error tolerant sparse deep neural network processor for IoT applications PN Whatmough, SK Lee, D Brooks, GY Wei IEEE Journal of Solid-State Circuits 53 (9), 2722-2731, 2018 | 45 | 2018 |
| Characterizing and evaluating voltage noise in multi-core near-threshold processors X Zhang, T Tong, S Kanev, SK Lee, GY Wei, D Brooks International Symposium on Low Power Electronics and Design (ISLPED), 82-87, 2013 | 43 | 2013 |
| A 16-core voltage-stacked system with an integrated switched-capacitor DC-DC converter SK Lee, T Tong, X Zhang, D Brooks, GY Wei 2015 Symposium on VLSI Circuits (VLSI Circuits), C318-C319, 2015 | 39 | 2015 |
| A fully integrated reconfigurable switched-capacitor DC-DC converter with four stacked output channels for voltage stacking applications T Tong, SK Lee, X Zhang, D Brooks, GY Wei IEEE Journal of Solid-State Circuits 51 (9), 2142-2152, 2016 | 27 | 2016 |
| Evaluation of voltage stacking for near-threshold multicore computing SK Lee, D Brooks, GY Wei Proceedings of the 2012 ACM/IEEE international symposium on Low power …, 2012 | 27 | 2012 |
| A multi-chip system optimized for insect-scale flapping-wing robots X Zhang, M Lok, T Tong, S Chaput, SK Lee, B Reagen, H Lee, D Brooks, ... 2015 Symposium on VLSI Circuits (VLSI Circuits), C152-C153, 2015 | 17 | 2015 |
| A 16-core voltage-stacked system with adaptive clocking and an integrated switched-capacitor dc–dc converter SK Lee, T Tong, X Zhang, D Brooks, GY Wei IEEE Transactions on Very Large Scale Integration (VLSI) Systems 25 (4 …, 2016 | 14 | 2016 |
| A fully integrated battery-powered system-on-chip in 40-nm CMOS for closed-loop control of insect-scale pico-aerial vehicle X Zhang, M Lok, T Tong, SK Lee, B Reagen, S Chaput, PEJ Duhamel, ... IEEE Journal of Solid-State Circuits 52 (9), 2374-2387, 2017 | 11 | 2017 |
| A 16nm 25mm2 SoC with a 54.5x Flexibility-Efficiency Range from Dual-Core Arm Cortex-A53 to eFPGA and Cache-Coherent Accelerators PN Whatmough, SK Lee, M Donato, HC Hsueh, S Xi, U Gupta, ... 2019 Symposium on VLSI Circuits, C34-C35, 2019 | 10 | 2019 |
| DNN ENGINE: A 16nm sub-uj deep neural network inference accelerator for the embedded masses P Whatmough, S Lee, N Mulholland, P Hansen, S Kodali, D Brooks, ... 2017 IEEE Hot Chips 29 Symposium, 2017 | 10 | 2017 |
| TuneLogic: Post-silicon tuning of dual-Vdd designs S Bijansky, SK Lee, A Aziz 2009 10th International Symposium on Quality Electronic Design, 394-400, 2009 | 10 | 2009 |
| A 16-nm always-on DNN processor with adaptive clocking and multi-cycle banked SRAMs SK Lee, PN Whatmough, D Brooks, GY Wei IEEE Journal of Solid-State Circuits 54 (7), 1982-1992, 2019 | 8 | 2019 |
| Fully-CMOS Multi-Level Embedded Non-Volatile Memory Devices With Reliable Long-Term Retention for Efficient Storage of Neural Network Weights S Ma, M Donato, SK Lee, D Brooks, GY Wei IEEE Electron Device Letters 40 (9), 1403-1406, 2019 | 6 | 2019 |
| A wide dynamic range sparse FC-DNN processor with multi-cycle banked SRAM read and adaptive clocking in 16nm FinFET SK Lee, PN Whatmough, N Mulholland, P Hansen, D Brooks, GY Wei ESSCIRC 2018-IEEE 44th European Solid State Circuits Conference (ESSCIRC …, 2018 | 5 | 2018 |
| A 3.0 tflops 0.62 v scalable processor core for high compute utilization ai training and inference J Oh, SK Lee, M Kang, M Ziegler, J Silberman, A Agrawal, ... 2020 IEEE Symposium on VLSI Circuits, 1-2, 2020 | 1 | 2020 |
| CHIPKIT: An agile, reusable open-source framework for rapid test chip development PN Whatmough, M Donato, GG Ko, SK Lee, D Brooks, GY Wei IEEE Micro 40 (4), 32-40, 2020 | 1 | 2020 |
| Sub-uJ deep neural networks for embedded applications PN Whatmough, SK Lee, GY Wei, D Brooks 2017 51st Asilomar Conference on Signals, Systems, and Computers, 1912-1915, 2017 | 1 | 2017 |
