| QUAC-TRNG: High-throughput true random number generation using quadruple row activation in commodity DRAM chips A Olgun, M Patel, AG Yağlıkçı, H Luo, JS Kim, FN Bostancı, N Vijaykumar, ... 2021 ACM/IEEE 48th Annual International Symposium on Computer Architecture …, 2021 | 62 | 2021 |
| DR-STRaNGe: End-to-End System Design for DRAM-based True Random Number Generators FN Bostancı, A Olgun, L Orosa, AG Yağlıkçı, JS Kim, H Hassan, O Ergin, ... 2022 IEEE International Symposium on High-Performance Computer Architecture …, 2022 | 21 | 2022 |
| Sectored DRAM: An Energy-Efficient High-Throughput and Practical Fine-Grained DRAM Architecture A Olgun, F Bostanci, GF Oliveira, YC Tugrul, R Bera, AG Yaglikci, ... arXiv preprint arXiv:2207.13795, 2022 | 5 | 2022 |
| MetaSys: A Practical Open-source Metadata Management System to Implement and Evaluate Cross-layer Optimizations N Vijaykumar, A Olgun, K Kanellopoulos, FN Bostanci, H Hassan, M Lotfi, ... ACM Transactions on Architecture and Code Optimization (TACO) 19 (2), 1-29, 2022 | 5 | 2022 |
| ABACuS: All-Bank Activation Counters for Scalable and Low Overhead RowHammer Mitigation A Olgun, YC Tugrul, N Bostanci, IE Yuksel, H Luo, S Rhyner, AG Yaglikci, ... arXiv preprint arXiv:2310.09977, 2024 | 4 | 2024 |
| PULSAR: Simultaneous Many-Row Activation for Reliable and High-Performance Computing in Off-the-Shelf DRAM Chips IE Yuksel, YC Tugrul, F Bostanci, AG Yaglikci, A Olgun, GF Oliveira, ... arXiv preprint arXiv:2312.02880, 2023 | 4 | 2023 |
| Functionally-Complete Boolean Logic in Real DRAM Chips: Experimental Characterization and Analysis İE Yüksel, YC Tuğrul, A Olgun, FN Bostancı, AG Yağlıkçı, GF Oliveira, ... 2024 IEEE International Symposium on High-Performance Computer Architecture …, 2024 | 3 | 2024 |
| MIMDRAM: An End-to-End Processing-Using-DRAM System for High-Throughput, Energy-Efficient and Programmer-Transparent Multiple-Instruction Multiple-Data Processing GF Oliveira, A Olgun, AG Yağlıkçı, F Bostancı, J Gómez-Luna, S Ghose, ... arXiv preprint arXiv:2402.19080, 2024 | 3 | 2024 |
| Ramulator 2.0: A Modern, Modular, and Extensible DRAM Simulator H Luo, YC Tu, FN Bostancı, A Olgun, AG Ya, O Mutlu IEEE Computer Architecture Letters, 2023 | 2 | 2023 |
| Utopia: Fast and Efficient Address Translation via Hybrid Restrictive & Flexible Virtual-to-Physical Address Mappings K Kanellopoulos, R Bera, K Stojiljkovic, FN Bostanci, C Firtina, ... Proceedings of the 56th Annual IEEE/ACM International Symposium on …, 2023 | 2 | 2023 |
| Victima: Drastically Increasing Address Translation Reach by Leveraging Underutilized Cache Resources K Kanellopoulos, HC Nam, N Bostanci, R Bera, M Sadrosadati, R Kumar, ... Proceedings of the 56th Annual IEEE/ACM International Symposium on …, 2023 | 2 | 2023 |
| TuRaN: True Random Number Generation Using Supply Voltage Underscaling in SRAMs İE Yüksel, A Olgun, B Salami, F Bostancı, YC Tuğrul, AG Yağlıkçı, ... arXiv preprint arXiv:2211.10894, 2022 | 2 | 2022 |
| CoMeT: Count-Min-Sketch-based Row Tracking to Mitigate RowHammer at Low Cost FN Bostanci, ISE Yüksel, A Olgun, K Kanellopoulos, YC Tuğrul, ... 2024 IEEE International Symposium on High-Performance Computer Architecture …, 2024 | 1 | 2024 |
| Amplifying Main Memory-Based Timing Covert and Side Channels using Processing-in-Memory Operations K Kanellopoulos, F Bostanci, A Olgun, AG Yaglikci, IE Yuksel, NM Ghiasi, ... arXiv preprint arXiv:2404.11284, 2024 | | 2024 |
| Dram üzerinde gerçek rastgele sayi üretme mekanizmalari için sistem tasarimi FN Bostancı TOBB ETÜ, 2022 | | 2022 |
