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N Prasad
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Anno
A new logic encryption strategy ensuring key interdependency
R Karmakar, N Prasad, S Chattopadhyay, R Kapur, I Sengupta
2017 30th International Conference on VLSI Design and 2017 16th …, 2017
382017
Design and evaluation of ZMesh topology for on-chip interconnection networks
N Prasad, P Mukherjee, S Chattopadhyay, I Chakrabarti
Journal of Parallel and Distributed Computing 113, 17-36, 2018
362018
Runtime Mitigation of Illegal Packet Request Attacks in Networks-on-Chip
N Prasad, R Karmakar, S Chattopadhyay, I Chakrabarti
2017 IEEE International Symposium on Circuits and Systems (ISCAS), 1-4, 2017
202017
A parallel stochastic number generator with bit permutation networks
V Sehwag, N Prasad, I Chakrabarti
IEEE Transactions on Circuits and Systems II: Express Briefs 65 (2), 231-235, 2017
172017
FPGA implementation of 16-point radix-4 complex FFT core using NEDA
A Mankar, AD Das, N Prasad
2013 Students Conference on Engineering and Systems (SCES), 1-5, 2013
132013
An energy-efficient network-on-chip-based reconfigurable Viterbi decoder architecture
N Prasad, I Chakrabarti, S Chattopadhyay
IEEE Transactions on Circuits and Systems I: Regular Papers 65 (10), 3543-3554, 2018
122018
FPGA implementation of pipelined CORDIC based quadrature direct digital synthesizer with improved SFDR
N Prasad, AK Swain, KK Mahapatra
2013 International Conference on Circuits, Power and Computing Technologies …, 2013
122013
Efficient VLSI Architectures of Split Radix FFT using New Distributed Arithmetic
AD Das, A Mankar, N Prasad, KK Mahapatra, AK Swain
International Journal of Soft Computing and Engineering 3 (1), 264-271, 2013
102013
A Spare Link Based Reliable Network-on-Chip Design
N Chatterjee, N Prasad, S Chattapadhya
VLSI Design and Test, 18th International Symposium on, 1-6, 2014
72014
Multiplier‐less VLSI architectures for radix‐22 folded pipelined complex FFT core
A Mankar, N Prasad, ADS Das, S Meher
International Journal of Circuit Theory and Applications 43 (11), 1743-1758, 2015
62015
Efficient VLSI implementation of CORDIC-based direct digital synthesizer
N Prasad, MR Tripathy, ADS Das, NR Behera, A Swain
Intelligent Computing, Communication and Devices: Proceedings of ICCD 2014 …, 2015
52015
FPGA implementation of retimed low power and high throughput DCT core using NEDA
A Mankar, N Prasad, AD Das
2013 Students Conference on Engineering and Systems (SCES), 1-4, 2013
52013
Design and error analysis of a scale free CORDIC unit with corrected scale factor
N Prasad, AK Swain, KK Mahapatra
2012 Asia Pacific Conference on Postgraduate Research in Microelectronics …, 2012
52012
Approximate conditional carry adder for error tolerant applications
AS Roy, N Prasad, AS Dhar
2016 20th International Symposium on VLSI Design and Test (VDAT), 1-6, 2016
32016
ZMesh: An Energy-Efficient Network-on-Chip Topology for Constant-Geometry Algorithms
N Prasad, S Chattopadhyay, I Chakrabarti
2015 IEEE International Symposium on Nanoelectronic and Information Systems …, 2015
32015
FPGA implementation of discrete Fourier transform core using NEDA
A Mankar, N Prasad, S Meher
2013 International Conference on Communication Systems and Network …, 2013
32013
Embedding delay‐based physical unclonable functions in networks‐on‐chip
P Nagabhushanamgari, V Sehwag, I Chakrabarti, S Chattopadhyay
IET Circuits, Devices & Systems 15 (1), 27-41, 2021
22021
NoC Based Multiplier-Less Constant Geometry FFT Architecture
N Prasad, I Chakrabarti, S Chattopadhyay
2014 Fourth International Conference of Emerging Applications of Information …, 2014
22014
Reconfigurable data parallel constant geometry fast Fourier transform architectures on Network-on-Chip
N Prasad, S Chattopadhyay, I Chakrabarti
Microprocessors and Microsystems 39 (8), 741-751, 2015
12015
FPGA Implementation of Low Latency Scaled CORDIC Based Discrete Fourier Transform Core
N Prasad, AK Swain, KK Mahapatra
2012 International Conference on Emerging Trends in Electrical Communication …, 2012
12012
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Articoli 1–20