| A 1.2 V 30nm 1.6 Gb/s/pin 4Gb LPDDR3 SDRAM with input skew calibration and enhanced control scheme YC Bae, JY Park, SJ Rhee, SB Ko, Y Jeong, KS Noh, Y Son, J Youn, ... Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2012 …, 2012 | 47 | 2012 |
| A 16Gb LPDDR4X SDRAM with an NBTI-tolerant circuit solution, an SWD PMOS GIDL reduction technique, an adaptive gear-down scheme and a metastable-free DQS aligner in a 10nm … KC Chun, YG Chu, JS Heo, TS Kim, S Kim, HK Yang, MJ Kim, CK Lee, ... Solid-State Circuits Conference-(ISSCC), 2018 IEEE International, 206-208, 2018 | 23 | 2018 |
| Semiconductor devices including an external power voltage control function and methods of operating the same JH Choi, MJ Kim, KS Noh, BR Cho US Patent 7,230,475, 2007 | 22 | 2007 |
| Semiconductor chip and semiconductor chip package comprising semiconductor chip ES Seo, MJ Kim, SY Kim US Patent 7,420,831, 2008 | 15 | 2008 |
| 100MHz-to–1GHz open-loop ADDLL with fast lock-time for mobile applications MJ Kim, LS Kim Custom Integrated Circuits Conference (CICC), 2010 IEEE, 1-4, 2010 | 13 | 2010 |
| A 100 MHz-to-1 GHz fast-lock synchronous clock generator with DCC for mobile applications MJ Kim, LS Kim IEEE Transactions on Circuits and Systems II: Express Briefs 58 (8), 477-481, 2011 | 12 | 2011 |
| Semiconductor memory device inputting and outputting a plurality of data length formats and method thereof SY Kim, MJ Kim, JS Ryoo US Patent 8,131,897, 2012 | 11 | 2012 |
| A 512 Mb two-channel mobile DRAM (OneDRAM) with shared memory array JS Kim, K Nam, CS Oh, HG Sohn, D Lee, S Kim, JW Park, Y Kim, MJ Kim, ... IEEE Journal of Solid-State Circuits 43 (11), 2381-2389, 2008 | 10 | 2008 |
| Level shifter circuit and method thereof Y Hui-Kap, YG Kang, KC Chun, ES Seo, MJ Kim US Patent App. 11/700,907, 2007 | 10 | 2007 |
| A 512 mb 2-channel mobile DRAM (oneDRAM™) with shared memory array K Nam, JS Kim, CS Oh, H Sohn, DH Lee, C Lee, S Kim, JW Park, Y Kim, ... Solid-State Circuits Conference, 2007. ASSCC'07. IEEE Asian, 204-207, 2007 | 9 | 2007 |
| Multipath accessible semiconductor memory device with host interface between processors HG Sohn, YM Lee, DH Lee, J Park, HC Lee, MJ Kim, JS Kim, CH Lee US Patent 7,941,612, 2011 | 2 | 2011 |
| Semiconductor memory device with operation environment information storing circuit and command storing function C Kim, M Kim, Y Chu, S Ko US Patent 9,940,046, 2018 | 1 | 2018 |
