| Design of low voltage low power CMOS analog multiplexer for bio-medical applications UG Chary, R Balabrahmam, AK Kuna Sateesh International Journal of Engineering and Advanced Technology (IJEAT) Vol 3 …, 2014 | 5 | 2014 |
| Low power analog multiplexers for ECG applications H Kakarla Journal of Physics: Conference Series 1804 (1), 012177, 2021 | 3 | 2021 |
| Ultra-low power circuit design using double-gate finfets GD Tejashwini, IBK Raju, G Chary 2014 2nd International Conference on Devices, Circuits and Systems (ICDCS), 1-5, 2014 | 3 | 2014 |
| FPGA implementation of industry automated bottle counter S Arvapally, MA Khan, PC Vemula, P Sonnaila, UG Chary 2017 International conference of Electronics, Communication and Aerospace …, 2017 | 2 | 2017 |
| Area-power efficient vedic multiplier using compressors R Abhilash, IBK Raju, G Chary, S Dubey 2015 International Conference on Electrical, Electronics, Signals …, 2015 | 2 | 2015 |
| Data Communication Using HDLC Protocol S Rampelly, SR Seri, G Chary, K Raju International Journal of Innovative Research in Electrical, Electronics …, 2014 | 2 | 2014 |
| Low power 16-channel data selector for bio-medical applications UG Chary, KS Rao International Journal of VLSI Design & Communication Systems 5 (6), 9, 2014 | 1 | 2014 |
| Performance of a Low-Power 6T-SRAM Cell for Energy-Efficient Leakage Reduction Using DTMOS Technique G Nibhasya, KH Kishore, F Noorbasha, UG Chary Proceedings of Fourth International Conference on Communication, Computing …, 2023 | | 2023 |
| Low Voltage and Low Power Front Panel Design for 12 Lead ECG UG Chary, KH Kishore IEEE Access 10, 69455-69461, 2022 | | 2022 |
| A Review paper on Optimized Reconfigurable Cell Array UG Chary, L Babitha, K Gopi, KC Kumar, KH Kishore 2021 5th International Conference on Electronics, Communication and …, 2021 | | 2021 |
| Design of parity generator and Parity checker using Quantum Automata M U.Gnaneshwara chary, Swathi INTERNATIONAL Journal of pure and Applied mathematics 118, 2018 | | 2018 |
| A Low Power Analysys of Calibration ResistanceCircuit Using DTMOS Logic UG chary International Journal of Pure and Applied Mathematics 118 (24), 2018 | | 2018 |
| ANALYSIS OF CLOCKFEEDTHROUGH ERROR REDUCTION IN CMOS ANALOG AND DIGITAL CIRCUITS AT 180 nm TECHNOLOGY NODE UG chary International Journal of Pure and Applied Mathematics 20 (Special Issue …, 2018 | | 2018 |
| A Low power DBI based CRC Design Using GDI Technology CV U.Gnaneshwara Chary, L.Babitha, M.Swati INTERNATIONAL CONFERENCE ON COMMUNICATIONS, SIGNAL PROCESSING, COMPUTING …, 2016 | | 2016 |
| 500nW A Low Power Switched Capacitor Based Active Low Pass Filter for Biomedical Applications I U. Gnaneshwara Chary, L.Babitha and Vandana.Ch, BVRIT - Telangana International journal of VLSi design and communication systems 7 (DOI : 10 …, 2016 | | 2016 |
| An Efficient VLSI Architecture for Matrix Based RNS Backward Converter B Rayapudi, IBK Raju, G Chary, P Deekonda, P Ummadisetti Procedia Computer Science 85, 271-277, 2016 | | 2016 |
| Mahipal Dargupally T. Vasudeva Reddy UG Chary | | 2014 |
| Design and Modeling of Schmitt Trigger-based Sub-Threshold 8T SRAM for Low Power Applications M Dargupally, TV Reddy, UG Chary International Journal of Computer Applications 104 (12), 2014 | | 2014 |
| IMPLEMENTATION OF LOW POWER DFT FOR PLL UG Chary, Y Reddy, B Ramya, R Reddy, C Kumar, KH Kishore | | |
| LOW QUANTUM COST REVERSIBLE LOGIC GATES AND QCA ARCHITECTURES UGG PRIYANKA | | |
