Lei Yang
Titolo
Citata da
Citata da
Anno
Accuracy vs. efficiency: Achieving both through fpga-implementation aware neural architecture search
W Jiang, X Zhang, EHM Sha, L Yang, Q Zhuge, Y Shi, J Hu
Proceedings of the 56th Annual Design Automation Conference 2019, 1-6, 2019
502019
Application mapping and scheduling for network-on-chip-based multiprocessor system-on-chip with fine-grain communication optimization
L Yang, W Liu, W Jiang, M Li, J Yi, EHM Sha
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 24 (10á…, 2016
322016
FoToNoC: A folded torus-like network-on-chip based many-core systems-on-chip in the dark silicon era
L Yang, W Liu, W Jiang, M Li, P Chen, EHM Sha
IEEE Transactions on Parallel and Distributed Systems 28 (7), 1905-1918, 2016
302016
Task mapping on smart noc: Contention matters, not the distance
L Yang, W Liu, P Chen, N Guan, M Li
Proceedings of the 54th Annual Design Automation Conference 2017, 1-6, 2017
222017
Hardware/software co-exploration of neural architectures
W Jiang, L Yang, EHM Sha, Q Zhuge, S Gu, S Dasgupta, Y Shi, J Hu
IEEE Transactions on Computer-Aided Design of Integrated Circuits andá…, 2020
202020
Achieving super-linear speedup across multi-fpga for real-time dnn inference
W Jiang, EHM Sha, X Zhang, L Yang, Q Zhuge, Y Shi, J Hu
ACM Transactions on Embedded Computing Systems (TECS) 18 (5s), 1-23, 2019
202019
Heterogeneous fpga-based cost-optimal design for timing-constrained cnns
W Jiang, EHM Sha, Q Zhuge, L Yang, X Chen, J Hu
IEEE Transactions on Computer-Aided Design of Integrated Circuits andá…, 2018
202018
Co-exploration of neural architectures and heterogeneous asic accelerator designs targeting multiple tasks
L Yang, Z Yan, M Li, H Kwon, L Lai, T Krishna, V Chandra, W Jiang, Y Shi
2020 57th ACM/IEEE Design Automation Conference (DAC), 1-6, 2020
172020
Chip temperature optimization for dark silicon many-core systems
M Li, W Liu, L Yang, P Chen, C Chen
IEEE Transactions on Computer-Aided Design of Integrated Circuits andá…, 2017
152017
FoToNoC: A hierarchical management strategy based on folded torus-like network-on-chip for dark silicon many-core systems
L Yang, W Liu, W Jiang, M Li, J Yi, EHM Sha
2016 21st Asia and South Pacific Design Automation Conference (ASP-DAC), 725-730, 2016
152016
Thermal-aware task mapping on dynamically reconfigurable network-on-chip based multiprocessor system-on-chip
W Liu, L Yang, W Jiang, L Feng, N Guan, W Zhang, N Dutt
IEEE Transactions on Computers 67 (12), 1818-1834, 2018
142018
Device-circuit-architecture co-exploration for computing-in-memory neural accelerators
W Jiang, Q Lou, Z Yan, L Yang, J Hu, XS Hu, Y Shi
IEEE Transactions on Computers, 2020
132020
Standing on the shoulders of giants: Hardware and neural architecture co-search with hot start
W Jiang, L Yang, S Dasgupta, J Hu, Y Shi
IEEE Transactions on Computer-Aided Design of Integrated Circuits andá…, 2020
92020
Energy-efficient application mapping and scheduling for lifetime guaranteed MPSoCs
W Liu, J Yi, M Li, P Chen, L Yang
IEEE Transactions on Computer-Aided Design of Integrated Circuits andá…, 2018
92018
Optimal functional-unit assignment for heterogeneous systems under timing constraint
W Jiang, EHM Sha, X Chen, L Yang, L Zhou, Q Zhuge
IEEE Transactions on Parallel and Distributed Systems 28 (9), 2567-2580, 2017
92017
Hardware-software collaboration for dark silicon heterogeneous many-core systems
L Yang, W Liu, W Jiang, C Chen, M Li, P Chen, HM Edwin
Future Generation Computer Systems 68, 234-247, 2017
92017
Dark silicon-aware hardware-software collaborated design for heterogeneous many-core systems
L Yang, W Liu, N Guan, M Li, P Chen, HM Edwin
2017 22nd Asia and South Pacific Design Automation Conference (ASP-DAC), 494-499, 2017
92017
Co-exploring neural architecture and network-on-chip design for real-time artificial intelligence
L Yang, W Jiang, W Liu, HM Edwin, Y Shi, J Hu
2020 25th Asia and South Pacific Design Automation Conference (ASP-DAC), 85-90, 2020
82020
Traffic-aware application mapping for network-on-chip based multiprocessor system-on-chip
L Yang, W Liu, W Jiang, W Zhang, M Li, J Yi, D Liu, EHM Sha
2015 IEEE 17th International Conference on High Performance Computing andá…, 2015
82015
Properties of self-timed ring architectures for deadlock-free and consistent configuration reaching maximum throughput
W Jiang, Q Zhuge, X Chen, L Yang, J Yi, EHM Sha
Journal of Signal Processing Systems 84 (1), 123-137, 2016
72016
Il sistema al momento non pu˛ eseguire l'operazione. Riprova pi¨ tardi.
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