Pierfrancesco Foglia
TitoloCitata daAnno
A real-time configurable NURBS interpolator with bounded acceleration, jerk and chord error
M Annoni, A Bardine, S Campanelli, P Foglia, CA Prete
Computer-Aided Design 44 (6), 509-521, 2012
492012
Analysis of static and dynamic energy consumption in nuca caches: Initial results
A Bardine, P Foglia, G Gabrielli, CA Prete
Proceedings of the 2007 workshop on MEmory performance: DEaling withá…, 2007
472007
Leveraging data promotion for low power D-NUCA caches
A Bardine, M Comparetti, P Foglia, G Gabrielli, CA Prete, P Stenstr÷m
2008 11th EUROMICRO Conference on Digital System Design Architecturesá…, 2008
322008
Way adaptable D-NUCA caches
A Bardine, M Comparetti, P Foglia, G Gabrielli, C Prete
International Journal of High Performance Systems Architecture 2 (3-4), 215-228, 2010
282010
A nuca model for embedded systems cache design
P Foglia, D Mangano, CA Prete
3rd Workshop on Embedded Systems for Real-Time Multimedia, 2005., 41-46, 2005
252005
Evaluation of Leakage Reduction Alternatives for Deep Submicron Dynamic Nonuniform Cache Architecture Caches
A Bardine, M Comparetti, P Foglia, CA Prete
IEEE transactions on VLSI 22 (1), 185-190, 2014
232014
Improving power efficiency of D-NUCA caches
A Bardine, P Foglia, G Gabrielli, CA Prete, P Stenstr÷m
ACM SIGARCH Computer Architecture News 35 (4), 53-58, 2007
232007
A power-efficient migration mechanism for D-NUCA caches
A Bardine, M Comparetti, P Foglia, G Gabrielli, CA Prete
2009 Design, Automation & Test in Europe Conference & Exhibition, 598-601, 2009
212009
Relating GSR signals to traditional usability metrics: Case study with an anthropomorphic web assistant
P Foglia, CA Prete, M Zanda
2008 IEEE Instrumentation and Measurement Technology Conference, 1814-1818, 2008
192008
Analysis of performance dependencies in NUCA-based CMP systems
P Foglia, F Panicucci, CA Prete, M Solinas
2009 21st International Symposium on Computer Architecture and Highá…, 2009
162009
Feedback-driven restructuring of multi-threaded applications for NUCA cache performance in CMPs
S Bartolini, P Foglia, M Solinas, CA Prete
2010 22nd International Symposium on Computer Architecture and Highá…, 2010
152010
Re-NUCA: Boosting CMP performance through block replication
P Foglia, CA Prete, M Solinas, G Monni
2010 13th Euromicro Conference on Digital System Design: Architecturesá…, 2010
152010
Use of a CORBA/RMI gateway: characterization of communication overhead
A Bechini, P Foglia, CA Prete
Proceedings of the 3rd international workshop on Software and performanceá…, 2002
152002
An architecture to integrate IEC 61131-3 systems in an IEC 61499 distributed solution
S Campanelli, P Foglia, CA Prete
Computers in Industry 72 (September 2015), 47-67, 2015
132015
An algorithm for the classification of coherence related overhead in shared-bus shared-memory multiprocessors
P Foglia
IEEE TCCA Newsletter, 40-46, 2001
132001
Exploring the Relationship between Architectures and Management Policies in the design of NUCA-based Chip Multicore Systems
CAP S. Bartolini, P. Foglia
Future Generation Computer Systems, 2018
122018
Exploiting replication to improve performances of NUCA-based CMP systems
P Foglia, M Solinas
ACM Transactions on Embedded Computing Systems (TECS) 13 (3s), 117:1-117:23, 2014
112014
A workload independent energy reduction strategy for D-NUCA caches
P Foglia, M Comparetti
The Journal of Supercomputing 68 (1), 157-182, 2014
112014
A cache design for high performance embedded systems
P Foglia, D Mangano, CA Prete
Journal of Embedded Computing 1 (4), 587-597, 2005
112005
NURBS interpolator with confined chord error and tangential and centripetal acceleration control
A Bardine, S Campanelli, P Foglia, CA Prete
International congress on ultra modern telecommunications and controlá…, 2010
102010
Il sistema al momento non pu˛ eseguire l'operazione. Riprova pi¨ tardi.
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