Vijaykrishnan Narayanan
Vijaykrishnan Narayanan
Robert Noll Chair Professor at The Pennsylvania State University
Verified email at cse.psu.edu
TitleCited byYear
Leakage Current: Moore
NS Kim, T Austin, D Blaauw, T Mudge, JS Hu, MJ Irwin, M Kandemir, ...
computer, 68-75, 2003
13592003
The design and use of simplepower: a cycle-accurate energy estimation tool
W Ye, N Vijaykrishnan, M Kandemir, MJ Irwin
Proceedings of the 37th Annual Design Automation Conference, 340-345, 2000
6242000
Design and management of 3D chip multiprocessors using network-in-memory
F Li, C Nicopoulos, T Richardson, Y Xie, V Narayanan, M Kandemir
33rd International Symposium on Computer Architecture (ISCA'06), 130-141, 2006
4692006
Analysis of error recovery schemes for networks on chips
S Murali, T Theocharides, N Vijaykrishnan, MJ Irwin, L Benini, ...
IEEE Design & Test of Computers 22 (5), 434-442, 2005
3772005
Dynamic management of scratch-pad memory space
M Kandemir, J Ramanujam, MJ Irwin, N Vijaykrishnan, I Kadayif, A Parikh
Proceedings of the 38th Design Automation Conference (IEEE Cat. No …, 2001
3592001
ViChaR: A dynamic virtual channel regulator for network-on-chip routers
CA Nicopoulos, D Park, J Kim, N Vijaykrishnan, MS Yousif, CR Das
Proceedings of the 39th Annual IEEE/ACM International Symposium on …, 2006
3552006
Energy-driven integrated hardware-software optimizations using SimplePower
N Vijaykrishnan, M Kandemir, MJ Irwin, HS Kim, W Ye
ACM SIGARCH Computer Architecture News 28 (2), 95-106, 2000
3432000
A novel dimensionally-decomposed router for on-chip communication in 3D architectures
J Kim, C Nicopoulos, D Park, R Das, Y Xie, V Narayanan, MS Yousif, ...
ACM SIGARCH Computer Architecture News 35 (2), 138-149, 2007
3042007
A low latency router supporting adaptivity for on-chip interconnects
J Kim, D Park, T Theocharides, N Vijaykrishnan, CR Das
Proceedings. 42nd Design Automation Conference, 2005., 559-564, 2005
2982005
Exploring fault-tolerant network-on-chip architectures
D Park, C Nicopoulos, J Kim, N Vijaykrishnan, CR Das
International Conference on Dependable Systems and Networks (DSN'06), 93-104, 2006
2782006
Fault tolerant algorithms for network-on-chip interconnect
M Pirretti, GM Link, RR Brooks, N Vijaykrishnan, M Kandemir, MJ Irwin
IEEE computer society annual symposium on VLSI, 46-51, 2004
2732004
Reducing leakage energy in FPGAs using region-constrained placement
A Gayasen, Y Tsai, N Vijaykrishnan, M Kandemir, MJ Irwin, T Tuan
Proceedings of the 2004 ACM/SIGDA 12th international symposium on Field …, 2004
2692004
Cache revive: architecting volatile STT-RAM caches for enhanced performance in CMPs
A Jog, AK Mishra, C Xu, Y Xie, V Narayanan, R Iyer, CR Das
DAC Design Automation Conference 2012, 243-252, 2012
2672012
A gracefully degrading and energy-efficient modular router architecture for on-chip networks
J Kim, C Nicopoulos, D Park, V Narayanan, MS Yousif, CR Das
ACM SIGARCH Computer Architecture News 34 (2), 4-15, 2006
2672006
Using complete machine simulation for software power estimation: The softwatt approach
S Gurumurthi, A Sivasubramaniam, MJ Irwin, N Vijaykrishnan, ...
Proceedings Eighth International Symposium on High Performance Computer …, 2002
2652002
MIRA: A multi-layered on-chip interconnect router architecture
D Park, S Eachempati, R Das, AK Mishra, Y Xie, N Vijaykrishnan, CR Das
2008 International Symposium on Computer Architecture, 251-261, 2008
2532008
Interconnect and thermal-aware floorplanning for 3D microprocessors
WL Hung, GM Link, Y Xie, N Vijaykrishnan, MJ Irwin
7th International Symposium on Quality Electronic Design (ISQED'06), 6 pp.-104, 2006
2292006
DRAM energy management using software and hardware directed power mode control
V Delaluz, M Kandemir, N Vijaykrishnan, A Sivasubramaniam, MJ Irwin
Proceedings HPCA Seventh International Symposium on High-Performance …, 2001
2232001
Design and evaluation of a hierarchical on-chip interconnect for next-generation CMPs
R Das, S Eachempati, AK Mishra, V Narayanan, CR Das
2009 IEEE 15th International Symposium on High Performance Computer …, 2009
2172009
Influence of compiler optimizations on system power
M Kandemir, N Vijaykrishnan, MJ Irwin, W Ye
Proceedings of the 37th Annual Design Automation Conference, 304-307, 2000
2062000
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