| Physically based modeling of low field electron mobility in ultrathin single-and double-gate SOI n-MOSFETs D Esseni, A Abramo, L Selmi, E Sangiorgi IEEE transactions on electron devices 50 (12), 2445-2455, 2003 | 196 | 2003 |
| Understanding quasi-ballistic transport in nano-MOSFETs: part I-scattering in the channel and in the drain P Palestri, D Esseni, S Eminente, C Fiegna, E Sangiorgi, L Selmi IEEE Transactions on Electron Devices 52 (12), 2727-2735, 2005 | 189 | 2005 |
| Scaling the MOS transistor below 0.1/spl mu/m: methodology, device structures, and technology requirements C Fiegna, H Iwai, T Wada, M Saito, E Sangiorgi, B Ricco IEEE Transactions on Electron Devices 41 (6), 941-951, 1994 | 168 | 1994 |
| Analysis of self-heating effects in ultrathin-body SOI MOSFETs by device simulation C Fiegna, Y Yang, E Sangiorgi, AG O'Neill IEEE Transactions on Electron Devices 55 (1), 233-244, 2007 | 166 | 2007 |
| Low field electron and hole mobility of SOI transistors fabricated on ultrathin silicon films for deep submicrometer technology application D Esseni, M Mastrapasqua, GK Celler, C Fiegna, L Selmi, E Sangiorgi IEEE Transactions on Electron Devices 48 (12), 2842-2850, 2001 | 151 | 2001 |
| Investigation of the p-GaN gate breakdown in forward-biased GaN-based power HEMTs AN Tallarico, S Stoffels, P Magnone, N Posthuma, E Sangiorgi, ... IEEE Electron Device Letters 38 (1), 99-102, 2016 | 145 | 2016 |
| A general purpose device simulator coupling Poisson and Monte Carlo transport with applications to deep submicron MOSFETs F Venturi, RK Smith, EC Sangiorgi, MR Pinto, B Ricco IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 1989 | 145 | 1989 |
| An experimental study of mobility enhancement in ultrathin SOI transistors operated in double-gate mode D Esseni, M Mastrapasqua, GK Celler, C Fiegna, L Selmi, E Sangiorgi IEEE Transactions on Electron Devices 50 (3), 802-808, 2003 | 138 | 2003 |
| A many-band silicon model for hot-electron transport at high energies R Brunetti, C Jacoboni, F Venturi, E Sangiorgi, B Ricco Solid-state electronics 32 (12), 1663-1667, 1989 | 128 | 1989 |
| Low field mobility of ultra-thin SOI N-and P-MOSFETs: Measurements and implications on the performance of ultra-short MOSFETs D Esseni, M Mastrapasqua, GK Celler, FH Baumann, C Fiegna, L Selmi, ... International Electron Devices Meeting 2000. Technical Digest. IEDM (Cat. No …, 2000 | 101 | 2000 |
| MOS/sup 2: an efficient MOnte Carlo Simulator for MOS devices E Sangiorgi, B Ricco, F Venturi IEEE transactions on computer-aided design of integrated circuits and …, 1988 | 92 | 1988 |
| Tunneling into interface states as reliability monitor for ultrathin oxides A Ghetti, E Sangiorgi, J Bude, TW Sorsch, G Weber IEEE Transactions on Electron Devices 47 (12), 2358-2365, 2000 | 88 | 2000 |
| PBTI in GaN-HEMTs With p-Type Gate: Role of the Aluminum Content on and Underlying Degradation Mechanisms AN Tallarico, S Stoffels, N Posthuma, P Magnone, D Marcon, S Decoutere, ... IEEE Transactions on Electron Devices 65 (1), 38-44, 2017 | 87 | 2017 |
| Simple and efficient modeling of EPROM writing C Fiegna, F Venturi, M Melanotte, E Sangiorgi, B Riccò IEEE transactions on electron devices 38 (3), 603-610, 1991 | 86 | 1991 |
| A semi-empirical model of surface scattering for Monte Carlo simulation of silicon n-MOSFETs E Sangiorgi, MR Pinto IEEE transactions on electron devices 39 (2), 356-361, 1992 | 82 | 1992 |
| Electron trapping/detrapping within thin SiO2 films in the high field tunneling regime P Olivo, B Ricco, E Sangiorgi Journal of applied physics 54 (9), 5267-5276, 1983 | 78 | 1983 |
| Silicon MOS transconductance scaling into the overshoot regime MR Pinto, E Sangiorgi, J Bude IEEE electron device letters 14 (8), 375-378, 1993 | 75 | 1993 |
| Understanding quasi-ballistic transport in nano-MOSFETs: Part II-Technology scaling along the ITRS S Eminente, D Esseni, P Palestri, C Fiegna, L Selmi, E Sangiorgi IEEE transactions on electron devices 52 (12), 2736-2743, 2005 | 72 | 2005 |
| An improved semi-classical Monte-Carlo approach for nano-scale MOSFET simulation P Palestri, S Eminente, D Esseni, C Fiegna, E Sangiorgi, L Selmi Solid-state electronics 49 (5), 727-732, 2005 | 70 | 2005 |
| A new scaling methodology for the 0.1-0.025/spl mu/m MOSFET Fiegna, Iwai, Wada, Saito, Sangiorgi, Ricco Symposium 1993 on VLSI Technology, 33-34, 1993 | 70 | 1993 |
