A low-noise quadrature VCO based on magnetically coupled resonators and a wideband frequency divider at millimeter waves U Decanis, A Ghilioni, E Monaco, A Mazzanti, F Svelto
IEEE Journal of Solid-State Circuits 46 (12), 2943-2955, 2011
99 2011 Injection-Locked CMOS Frequency Doublers for E Monaco, M Pozzoni, F Svelto, A Mazzanti
IEEE Journal of Solid-State Circuits 45 (8), 1565-1574, 2010
92 2010 A 33.6-to-46.2 GHz 32nm CMOS VCO with 177.5 dBc/Hz minimum noise FOM using inductor splitting for tuning extension E Mammei, E Monaco, A Mazzanti, F Svelto
2013 IEEE international solid-state circuits conference digest of technical …, 2013
73 2013 A mm-wave quadrature VCO based on magnetically coupled resonators U Decanis, A Ghilioni, E Monaco, A Mazzanti, F Svelto
2011 IEEE International Solid-State Circuits Conference, 280-282, 2011
52 2011 A 2–11 GHz 7-bit high-linearity phase rotator based on wideband injection-locking multi-phase generation for high-speed serial links in 28-nm CMOS FDSOI E Monaco, G Anzalone, G Albasini, S Erba, M Bassi, A Mazzanti
IEEE Journal of Solid-State Circuits 52 (7), 1739-1752, 2017
50 2017 6.4 A 64Gb/s PAM-4 transmitter with 4-Tap FFE and 2.26 pJ/b energy efficiency in 28nm CMOS FDSOI G Steffan, E Depaoli, E Monaco, N Sabatino, W Audoglio, AA Rossi, ...
2017 IEEE International Solid-State Circuits Conference (ISSCC), 116-117, 2017
50 2017 A 4.9 pJ/b 16-to-64Gb/s PAM-4 VSR transceiver in 28nm FDSOI CMOS E Depaoli, E Monaco, G Steffan, M Mazzini, H Zhang, W Audoglio, ...
2018 IEEE International Solid-State Circuits Conference-(ISSCC), 112-114, 2018
48 2018 A 6.5 mW inductorless CMOS frequency divider-by-4 operating up to 70GHz A Ghilioni, U Decanis, E Monaco, A Mazzanti, F Svelto
2011 IEEE International Solid-State Circuits Conference, 282-284, 2011
38 2011 A 13.1% tuning range 115GHz frequency generator based on an injection-locked frequency doubler in 65nm CMOS A Mazzanti, E Monaco, M Pozzoni, F Svelto
2010 IEEE International Solid-State Circuits Conference-(ISSCC), 422-423, 2010
21 2010 A 112 Gb/s PAM-4 RX front-end with unclocked decision feedback equalizer I Petricli, H Zhang, E Monaco, G Albasini, A Mazzanti
IEEE Transactions on Circuits and Systems II: Express Briefs 68 (1), 256-260, 2020
13 2020 A 5.2 mW Ku-band CMOS injection-locked frequency doubler with differential input/output E Monaco, M Borgarino, F Svelto, A Mazzanti
2009 IEEE Custom Integrated Circuits Conference, 61-64, 2009
11 2009 Frequency doubler and related method of generating an oscillating voltage E Depaoli, G Steffan, M Pozzoni, S Erba, E Monaco
US Patent 9,444,438, 2016
10 2016 Injection locked ring oscillator circuit with an analog quadrature calibration loop E Monaco, G Anzalone, S Erba
US Patent 9,444,435, 2016
7 2016 A 6mW, 115GHz CMOS injection-locked frequency doubler with differential output E Monaco, M Pozzoni, F Svelto, A Mazzanti
2010 IEEE International Conference on Integrated Circuit Design and …, 2010
7 2010 A High Linearity Driver with Embedded Interleaved Track-and-Hold Array for High-Speed ADC A Di Pasquo, C Nani, E Monaco, L Fanucci
2021 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2021
5 2021 Flexible Transversal Continuous-Time Linear Equalizer Operating up to 25Gb/s in 28nm CMOS H Zhang, E Monaco, M Bassi, A Mazzanti
2018 IEEE International Symposium on Circuits and Systems (ISCAS), 1-4, 2018
5 2018 A 0.2–11.7 GHz, high accuracy injection-locking multi-phase generation with mixed analog/digital calibration loops in 28nm FDSOI CMOS G Anzalone, E Monaco, G Albasini, S Erba, A Mazzanti
ESSCIRC Conference 2016: 42nd European Solid-State Circuits Conference, 335-338, 2016
5 2016 A Track-and-Hold Circuit with Tunable Non-Linearity and a Calibration Loop for PAM-8 SerDes Receivers A Di Pasquo, E Monaco, N Ghittori, C Nani, L Fanucci
Electronics 11 (14), 2199, 2022
3 2022 The impact of CMOS scaling on the design of circuits for mm-wave frequency synthesizers F Svelto, A Ghilioni, E Monaco, E Mammei, A Mazzanti
High-Performance AD and DA Converters, IC Design in Scaled Technologies, and …, 2015
3 2015 Successive approximation register (SAR) analog to digital converter (ADC) with partial loop-unrolling N Ghittori, C Nani, E Monaco
US Patent 10,469,096, 2019
2 2019 
Mazzanti AndreaProfessor of Electronics at Università di PaviaEmail verificata su unipv.it
